nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
1 |
A Combined Clustering and Neural Network Approach for Analog Multiple Hard Fault Classification
|
M.A. El-Gamal |
|
1999 |
14 |
3 |
p. 207-217 11 p. |
artikel |
2 |
A Combined Clustering and Neural Network Approach for Analog Multiple Hard Fault Classification
|
El-Gamal, M.A. |
|
1999 |
14 |
3 |
p. 207-217 |
artikel |
3 |
A Method for Designing a Deterministic Test Pattern Generator Based on Cellular Automata
|
María José López |
|
1999 |
14 |
3 |
p. 245-258 14 p. |
artikel |
4 |
A Method for Designing a Deterministic Test Pattern Generator Based on Cellular Automata
|
López, María José |
|
1999 |
14 |
3 |
p. 245-258 |
artikel |
5 |
Built-in Self Test Based on Multiple On-Chip Signature Checking
|
Mohammed Fadle Abdulla |
|
1999 |
14 |
3 |
p. 227-244 18 p. |
artikel |
6 |
Built-in Self Test Based on Multiple On-Chip Signature Checking
|
Abdulla, Mohammed Fadle |
|
1999 |
14 |
3 |
p. 227-244 |
artikel |
7 |
Editorial
|
Vishwani D. Agrawal |
|
1999 |
14 |
3 |
p. 187-188 2 p. |
artikel |
8 |
Editorial
|
Agrawal, Vishwani D. |
|
1999 |
14 |
3 |
p. 187-188 |
artikel |
9 |
Erratum to An Algebra of Multiple Faults in RAMs
|
J.A. Brzozowski |
|
1999 |
14 |
3 |
p. 305-306 2 p. |
artikel |
10 |
Erratum to An Algebra of Multiple Faults in RAMs
|
Brzozowski, J.A. |
|
1999 |
14 |
3 |
p. 305-306 |
artikel |
11 |
Experimental Results for Self-Dual Multi-Output Combinational Circuits
|
Vl. V. Saposhnikov |
|
1999 |
14 |
3 |
p. 295-300 6 p. |
artikel |
12 |
Experimental Results for Self-Dual Multi-Output Combinational Circuits
|
Saposhnikov, Vl. V. |
|
1999 |
14 |
3 |
p. 295-300 |
artikel |
13 |
Intelligent Analysis and Off-Line Debugging of VLSI Device Test Programs
|
Yuhai Ma |
|
1999 |
14 |
3 |
p. 273-293 21 p. |
artikel |
14 |
Intelligent Analysis and Off-Line Debugging of VLSI Device Test Programs
|
Ma, Yuhai |
|
1999 |
14 |
3 |
p. 273-293 |
artikel |
15 |
Partial Reset Methodology and Experiments for Improving Random-Pattern Testability and BIST of Sequential Circuits
|
Huy Nguyen |
|
1999 |
14 |
3 |
p. 259-272 14 p. |
artikel |
16 |
Partial Reset Methodology and Experiments for Improving Random-Pattern Testability and BIST of Sequential Circuits
|
Nguyen, Huy |
|
1999 |
14 |
3 |
p. 259-272 |
artikel |
17 |
Testability of 2-Level AND/EXOR Circuits
|
Rolf Drechsler |
|
1999 |
14 |
3 |
p. 219-225 7 p. |
artikel |
18 |
Testability of 2-Level AND/EXOR Circuits
|
Drechsler, Rolf |
|
1999 |
14 |
3 |
p. 219-225 |
artikel |
19 |
Test Generation for Mixed-Signal Devices Using Signal Flow Graphs
|
Rajesh Ramadoss |
|
1999 |
14 |
3 |
p. 189-205 17 p. |
artikel |
20 |
Test Generation for Mixed-Signal Devices Using Signal Flow Graphs
|
Ramadoss, Rajesh |
|
1999 |
14 |
3 |
p. 189-205 |
artikel |
21 |
Testing of Oscillators
|
Andreas Rusznyak |
|
1999 |
14 |
3 |
p. 301-304 4 p. |
artikel |
22 |
Testing of Oscillators
|
Rusznyak, Andreas |
|
1999 |
14 |
3 |
p. 301-304 |
artikel |