nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
1 |
An effective model for analysing tunneling gate leakage currents through ultrathin oxides and high-k gate stacks from Si inversion layers
|
Govoreanu, Bogdan |
|
2004 |
48 |
4 |
p. 617-625 9 p. |
artikel |
2 |
Atomic-scale modeling of double-gate MOSFETs using a tight-binding Green’s function formalism
|
Bescond, M. |
|
2004 |
48 |
4 |
p. 567-574 8 p. |
artikel |
3 |
CMOS downsizing toward sub-10 nm
|
Iwai, Hiroshi |
|
2004 |
48 |
4 |
p. 497-503 7 p. |
artikel |
4 |
Comparative analysis of the RF and noise performance of bulk and single-gate ultra-thin SOI MOSFETs by numerical simulation
|
Eminente, Simone |
|
2004 |
48 |
4 |
p. 543-549 7 p. |
artikel |
5 |
Coupling effects and channels separation in FinFETs
|
Daugé, F. |
|
2004 |
48 |
4 |
p. 535-542 8 p. |
artikel |
6 |
DC and AC MOS transistor modelling in presence of high gate leakage and experimental validation
|
Gilibert, F. |
|
2004 |
48 |
4 |
p. 597-608 12 p. |
artikel |
7 |
Development of an analytical mobility model for the simulation of ultra-thin single- and double-gate SOI MOSFETs
|
Alessandrini, Marco |
|
2004 |
48 |
4 |
p. 589-595 7 p. |
artikel |
8 |
Electrical analysis of external mechanical stress effects in short channel MOSFETs on (001) silicon
|
Gallon, C. |
|
2004 |
48 |
4 |
p. 561-566 6 p. |
artikel |
9 |
Foreword
|
Selmi, Luca |
|
2004 |
48 |
4 |
p. 495-496 2 p. |
artikel |
10 |
Full-band approaches to the electronic properties of nanometer-scale MOS structures
|
Sacconi, Fabio |
|
2004 |
48 |
4 |
p. 575-580 6 p. |
artikel |
11 |
Impact of technology parameters on device performance of UTB-SOI CMOS
|
Schulz, T. |
|
2004 |
48 |
4 |
p. 521-527 7 p. |
artikel |
12 |
Modelling and simulation challenges for nanoscale MOSFETs in the ballistic limit
|
Curatola, G. |
|
2004 |
48 |
4 |
p. 581-587 7 p. |
artikel |
13 |
On the extraction of the channel current in permeable gate oxide MOSFETs
|
Palestri, P. |
|
2004 |
48 |
4 |
p. 609-615 7 p. |
artikel |
14 |
Performance evaluation of ultra-thin gate-oxide CMOS circuits
|
Marras, Alessandro |
|
2004 |
48 |
4 |
p. 551-559 9 p. |
artikel |
15 |
Single, double and surround gate vertical MOSFETs with reduced parasitic capacitance
|
Gili, E. |
|
2004 |
48 |
4 |
p. 511-519 9 p. |
artikel |
16 |
Subthreshold behavior of triple-gate MOSFETs on SOI material
|
Lemme, M.C. |
|
2004 |
48 |
4 |
p. 529-534 6 p. |
artikel |
17 |
Towards the limits of conventional MOSFETs: case of sub 30 nm NMOS devices
|
Bertrand, G. |
|
2004 |
48 |
4 |
p. 505-509 5 p. |
artikel |