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                                       Details for article 6 of 17 found articles
 
 
  DC and AC MOS transistor modelling in presence of high gate leakage and experimental validation
 
 
Title: DC and AC MOS transistor modelling in presence of high gate leakage and experimental validation
Author: Gilibert, F.
Rideau, D.
Bernardini, S.
Scheer, P.
Minondo, M.
Roy, D.
Gouget, G.
Juge, A.
Appeared in: Solid-state electronics
Paging: Volume 48 (2004) nr. 4 pages 12 p.
Year: 2004
Contents:
Publisher: Elsevier Ltd
Source file: Elektronische Wetenschappelijke Tijdschriften
 
 

                             Details for article 6 of 17 found articles
 
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 Koninklijke Bibliotheek - National Library of the Netherlands