Digital Library
Close Browse articles from a journal
     Journal description
       All volumes of the corresponding journal
         All issues of the corresponding volume
                                       All articles of the corresponding issues
 
                             34 results found
no title author magazine year volume issue page(s) type
1 A comparative study of energy/power consumption in parallel decimal multipliers Malekpour, Amin

45 6 p. 775-780
article
2 A current-/voltage-controlled four-slope operation square-/triangular-wave generator and a dual-mode pulse width modulation signal generator employing current-feedback operational amplifiers Chien, Hung-Chun

45 6 p. 634-647
article
3 A 2D sub-threshold current model for single halo triple material surrounding gate (SHTMSG) MOSFETs Suveetha Dhanaselvam, P.

45 6 p. 574-577
article
4 A fully integrated analog front-end circuit for 13.56MHz passive RFID tags in conformance with ISO/IEC 18000-3 protocol Zhang, Jian

45 6 p. 578-588
article
5 A fully integrated feedback AGC loop for ZigBee (IEEE 802.15.4) RF transceiver applications Li, Di

45 6 p. 657-665
article
6 A low phase noise and low power 3–5GHz frequency synthesizer in 0.18µm CMOS technology Abiri, Ebrahim

45 6 p. 740-750
article
7 A low power Ku phase locked oscillator in low cost 130nm CMOS technology Magnani, Alessandro

45 6 p. 619-626
article
8 A merged magnetotransistor for 3-axis magnetic field measurement based on carrier recombination–deflection effect Leepattarapongpan, Chana

45 6 p. 565-573
article
9 An all-digital coherent-like BFSK demodulator Liu, Xiaopeng

45 6 p. 793-798
article
10 Analysis of a read disturb-free 9T SRAM cell with bit-interleaving capability Wen, Liang

45 6 p. 815-824
article
11 An auto-calibrated, dual-mode SRAM macro using a hybrid offset-cancelled sense amplifier Attarzadeh, H.

45 6 p. 781-792
article
12 An 8-bit low power DAC with re-used distributed binary cells architecture for reconfigurable transmitters Sarkar, Santanu

45 6 p. 666-677
article
13 A new tunable current-mode peak detector Petrović, Predrag B.

45 6 p. 805-814
article
14 An FPGA based scalable architecture of a stochastic state point process filter (SSPPF) to track the nonlinear dynamics underlying neural spiking Xin, Yao

45 6 p. 690-701
article
15 An output-capacitor-free low-dropout regulator with subthreshold slew-rate enhancement technique Zeng, Yanhan

45 6 p. 708-718
article
16 A novel digital logic implementation approach on nanocrossbar arrays using memristor-based multiplexers Owlia, Hadi

45 6 p. 597-603
article
17 A novel test optimizing algorithm for sequential fault diagnosis Yang, Chenglin

45 6 p. 719-727
article
18 A SiGe HBT low noise amplifier using on-chip notch filter for K band wireless communication Jing, Kai

45 6 p. 683-689
article
19 A SiGe LC-ladder low noise amplifier with base resistance match, gain and noise flatness for UWB applications Jing, Kai

45 6 p. 648-656
article
20 Compact modeling of response time and random-dopant-fluctuation-induced variability in nanoscale CMOS inverter Lü, Wei-feng

45 6 p. 678-682
article
21 Compact VDTA-based current-mode electronically tunable universal filters using grounded capacitors Satansup, Jetsdaporn

45 6 p. 613-618
article
22 Design of Sub-1mW CMOS LC VCO based on current reused topology with Q-enhancement and body-biased technique Hsu, Meng-Ting

45 6 p. 627-633
article
23 Editorial board
45 6 p. i
article
24 Efficient reversible NOR gates and their mapping in optical computing domain Kotiyal, Saurabh

45 6 p. 825-834
article
25 Heuristic receiver for implantable UWB applications Iji, Ayobami

45 6 p. 728-733
article
26 High-speed continuous-time band pass ΔΣ modulator for class-S systems Park, Bong-Hyuk

45 6 p. 559-564
article
27 Investigation of the total dose response of partially depleted SOI nMOSFETs using TCAD simulation and experiment Huang, Huixiang

45 6 p. 759-766
article
28 Length matching in detailed routing for analog and mixed signal circuits Yao, Hailong

45 6 p. 604-612
article
29 Localization of temperature sensitive areas on analog circuits Eichenseer, Christoph

45 6 p. 734-739
article
30 Monolithic integration of Giant Magnetoresistance (GMR) devices onto standard processed CMOS dies Cubells-Beltrán, M.-Dolores

45 6 p. 702-707
article
31 QBNoC: QoS-aware bufferless NoC architecture Zhang, Na

45 6 p. 751-758
article
32 Trajectory prediction control for digital control DC–DC converters with fast transient response Wang, Qing

45 6 p. 767-774
article
33 Truncated squarer with minimum mean-square error Petra, Nicola

45 6 p. 799-804
article
34 Uncalibrated automatic bridge-based CMOS integrated interfaces for wide-range resistive sensors portable applications Mantenuto, P.

45 6 p. 589-596
article
                             34 results found
 
 Koninklijke Bibliotheek - National Library of the Netherlands