nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
1 |
A compact fifth-order SIW BPF based on TSV technology with high selectivity
|
Wang, Fengjuan |
|
|
144 |
C |
p. |
artikel |
2 |
A 8–12 GHz power amplifier with high out-of-band rejection
|
Li, Shengqi |
|
|
144 |
C |
p. |
artikel |
3 |
A 10-kHz BW 104.3-dB DR discrete-time delta-sigma modulator with ring-amplifier-based integrator
|
Li, Yuming |
|
|
144 |
C |
p. |
artikel |
4 |
A 2-2 MASH ΔΣ ADC with fast-charge CLS input buffer and dual double sampling achieving 103.3-dB SNDR and ±2.5-ppm/FSR INL
|
Chen, Yang |
|
|
144 |
C |
p. |
artikel |
5 |
A 0.55-mm2 8-bit 32-GS/s TI-SAR ADC with optimized hierarchical sampling architecture
|
Ding, Jiale |
|
|
144 |
C |
p. |
artikel |
6 |
A 8.1-nW, 4.22-kHz, −40–85 °C relaxation oscillator with subthreshold leakage current compensation and forward body bias buffer for low power IoT applications
|
Zhou, Rong |
|
|
144 |
C |
p. |
artikel |
7 |
Artificial neural network models for metal-ferroelectric-insulator-semiconductor ferroelectric tunnel junction memristor
|
Li, Tiancheng |
|
|
144 |
C |
p. |
artikel |
8 |
A runtime-reconfigurable convolutional engine using tensor multiplication with multiple computing modes in 22-nm CMOS
|
Qian, Junyi |
|
|
144 |
C |
p. |
artikel |
9 |
A 6T1C pixel circuit compensating for TFT electrical characteristics variations, voltage drop, and OLED degradation
|
Zhao, Huicheng |
|
|
144 |
C |
p. |
artikel |
10 |
A 9T-SRAM in-memory computing macro for Boolean logic and multiply-and-accumulate operations
|
Dai, Chenghu |
|
|
144 |
C |
p. |
artikel |
11 |
A 1.8 V 98.6 dB SNDR discrete-time CMOS delta-sigma ADC
|
Wei, Cong |
|
|
144 |
C |
p. |
artikel |
12 |
A wideband low power RF Receiver Front-End for Internet-of-Things applications
|
Zhou, Rong |
|
|
144 |
C |
p. |
artikel |
13 |
Comprehensive experimental study on Schottky contact super barrier rectifier
|
Yu, Qisheng |
|
|
144 |
C |
p. |
artikel |
14 |
Demonstration of a novel Dual-Source Elevated-Channel Dopingless TFET with improved DC and Analog/RF performance
|
Ashok, Tammisetti |
|
|
144 |
C |
p. |
artikel |
15 |
Design and analysis of a high-speed low-power comparator with regeneration enhancement and through current suppression techniques from 4 K to 300 K in 65-nm Cryo-CMOS
|
Pai, Chia-Wei |
|
|
144 |
C |
p. |
artikel |
16 |
Editorial Board
|
|
|
|
144 |
C |
p. |
artikel |
17 |
Effect of 60Coγ ray radiation on electrical properties of SiGe HBTs at low temperatures
|
Feng, Yahui |
|
|
144 |
C |
p. |
artikel |
18 |
Electrical characteristics assessment and noise analysis of pocket-doped multi source T-shaped gate tunnel FET
|
Kumari, Sushmita |
|
|
144 |
C |
p. |
artikel |
19 |
High-performance montgomery modular multiplier with NTT and negative wrapped convolution
|
Ke, Hongfei |
|
|
144 |
C |
p. |
artikel |
20 |
Improvement of reverse conduction characteristic and single event effect for a novel vertical GaN field effect transistor with an integrated MOS-channel diode
|
Xie, Xintong |
|
|
144 |
C |
p. |
artikel |
21 |
Inverter-based noise-shaping SAR ADC for low-power applications
|
Badawy, Ali |
|
|
144 |
C |
p. |
artikel |
22 |
Noninverting Schmitt trigger circuit with electronically tunable hysteresis
|
Kannaujiya, Aryan |
|
|
144 |
C |
p. |
artikel |
23 |
Novel low loss dual-trench superjunction IGBT with semi-floating P-pillar
|
Shen, Zhigang |
|
|
144 |
C |
p. |
artikel |
24 |
Numerical simulation of copper electrodeposition for Through Silicon Via (TSV) with SPS-PEG-Cl additive system
|
Tao, Yanan |
|
|
144 |
C |
p. |
artikel |
25 |
Optimization of DE-QG TFET using novel CIP and DCT techniques
|
T.S., Manivannan |
|
|
144 |
C |
p. |
artikel |
26 |
OTK-based PUF CRP obfuscation for IoT device authentication
|
Roy, Aditi |
|
|
144 |
C |
p. |
artikel |
27 |
Physics based model development of a double gate reverse T-shaped channel TFET including 1D and 2D band-to-band tunneling components
|
Manikanta, K. |
|
|
144 |
C |
p. |
artikel |
28 |
Reliability analysis and comparison of ring-PUF based on probabilistic models
|
Bian, Jingchang |
|
|
144 |
C |
p. |
artikel |
29 |
Single inductor multi-PZTs SECE and electromagnetic voltage multiplier rectifier hybrid interface circuit
|
Shi, Ge |
|
|
144 |
C |
p. |
artikel |
30 |
The area-efficient gate level information flow tracking schemes of digital circuit with multi-level security lattice
|
Chen, Yongliang |
|
|
144 |
C |
p. |
artikel |
31 |
Variations of single event transient induced by line edge roughness (LER) and temperature in FinFET
|
Liu, Baojun |
|
|
144 |
C |
p. |
artikel |