| nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
| 1 |
A 16-bit 300-kS/s foreground calibration SAR ADC with single-ended/differential configurable input modes
|
Bao, Yuanxin
|
|
|
128 |
C |
p.
|
artikel
|
| 2 |
A 12bit 250 MS/s 5.43fJ/conversion-step SAR ADC with adaptive asynchronous logic in 28 nm CMOS
|
Sun, Ting
|
|
|
128 |
C |
p.
|
artikel
|
| 3 |
Accurate method to calculate noise figure in a low noise amplifier: Quantum theory analysis
|
Salmanogli, Ahmad
|
|
|
128 |
C |
p.
|
artikel
|
| 4 |
A compact sub-Hertz local field potential amplifier for implantable biomedical devices
|
Dwivedi, Shashank
|
|
|
128 |
C |
p.
|
artikel
|
| 5 |
A comparative study of SiC MOSFETs with and without integrated SBD
|
Tang, Lei
|
|
|
128 |
C |
p.
|
artikel
|
| 6 |
A constant charging-current relaxation oscillator with a duty-cycled main comparator and an adaptive auxiliary comparator
|
Hu, Yi
|
|
|
128 |
C |
p.
|
artikel
|
| 7 |
A − 110 dB THD rail-to-rail class-AB programmable gain amplifier with common-mode-detection-based transconductance linearization scheme
|
Tang, Fang
|
|
|
128 |
C |
p.
|
artikel
|
| 8 |
A general and efficient clocking scheme for majority logic in quantum-dot cellular automata
|
Deng, Feifei
|
|
|
128 |
C |
p.
|
artikel
|
| 9 |
A 0.8–3.2 GHz PLL with wide frequency division ratio range
|
Wu, Jin
|
|
|
128 |
C |
p.
|
artikel
|
| 10 |
A GPGPU microarchitecture supports multi-path execution and branch compaction
|
Jia, Shiwei
|
|
|
128 |
C |
p.
|
artikel
|
| 11 |
A hardware accelerator for IEEE 802.15.4 Time-Slotted Channel Hopping transceiver
|
Kalatehbali, Hamid Rahimian
|
|
|
128 |
C |
p.
|
artikel
|
| 12 |
A hardware-efficient computing engine for FPGA-based deep convolutional neural network accelerator
|
Li, Xueming
|
|
|
128 |
C |
p.
|
artikel
|
| 13 |
A 4H–SiC double trench MOSFET with split gate and integrated MPS diode
|
Peng, Disen
|
|
|
128 |
C |
p.
|
artikel
|
| 14 |
A 28 nm 512 Kb adjacent 2T2R RRAM PUF with interleaved cell mirroring and self-adaptive splitting for high density and low BER cryptographic key in IoT devices
|
Yang, Jianguo
|
|
|
128 |
C |
p.
|
artikel
|
| 15 |
An offset cancellation technique for SRAM sense amplifier based on relation of the delay and offset
|
Zhao, Yue
|
|
|
128 |
C |
p.
|
artikel
|
| 16 |
A novel LDMOS with optimized electric field distribution to eliminate substrate assisted depletion effect
|
Zhu, Shunwei
|
|
|
128 |
C |
p.
|
artikel
|
| 17 |
A stable voltage island-driven floorplanning with fixed-outline constraint for low power SoC
|
Shimin, Du
|
|
|
128 |
C |
p.
|
artikel
|
| 18 |
A wideband, 25/40dBm high I/O power GaN HEMT ultra-low noise amplifier using even-odd mode techniques
|
Gupta, Manishankar Prasad
|
|
|
128 |
C |
p.
|
artikel
|
| 19 |
A 325-μW step-16 digital-sensor based on dual-delay-chain in 180-nm CMOS
|
Gan, Jie
|
|
|
128 |
C |
p.
|
artikel
|
| 20 |
Comparison in radiation tolerance between FLR planar junction termination and positive bevel edge termination for power diodes
|
Liao, Xinfang
|
|
|
128 |
C |
p.
|
artikel
|
| 21 |
Comprehensive characterization of vertical GaN-on-GaN Schottky barrier diodes
|
Raja, P. Vigneshwara
|
|
|
128 |
C |
p.
|
artikel
|
| 22 |
Design of a 24×28 gbaud tunable channel attenuator IC for PCB backplane transmission
|
Wang, Hui
|
|
|
128 |
C |
p.
|
artikel
|
| 23 |
Editorial Board
|
|
|
|
128 |
C |
p.
|
artikel
|
| 24 |
Efficient hardware realization and high radix implementation of modular multi exponential techniques for public key cryptography
|
Tiwari, Utkarsh
|
|
|
128 |
C |
p.
|
artikel
|
| 25 |
Electronic transport in doped and dielectric inserted MLGNR interconnects: Crosstalk induced delay and stability analyses at sub-threshold regime
|
Sidhu, Ramneek
|
|
|
128 |
C |
p.
|
artikel
|
| 26 |
FE/PE/DE gate stack enabling improved analog performance in partially Junction-less NCFETs
|
Kansal, Harshit
|
|
|
128 |
C |
p.
|
artikel
|
| 27 |
Frequency-scaled thermal-aware test scheduling for 3D ICs using machine learning based temperature estimation
|
Chatterjee, Subhajit
|
|
|
128 |
C |
p.
|
artikel
|
| 28 |
Hierarchical parallel difference-equalization and channels regrouping based estimation of timing skew for time-interleaved ADCs
|
Zhi, He
|
|
|
128 |
C |
p.
|
artikel
|
| 29 |
Investigation of dopingless transistor with field plates for analog and digital applications
|
Zafar, Samreen
|
|
|
128 |
C |
p.
|
artikel
|
| 30 |
Low-power bulk-driven time-domain comparator with high voltage-to-time gain for ADC applications
|
Sanati, Roohollah
|
|
|
128 |
C |
p.
|
artikel
|
| 31 |
Miller compensated four-stage OTA with Q-reduction for wide range of load capacitors
|
Manikandan, P.
|
|
|
128 |
C |
p.
|
artikel
|
| 32 |
RLDA: Valid test pattern identification by machine learning classification method for VLSI test
|
Song, Tai
|
|
|
128 |
C |
p.
|
artikel
|
| 33 |
Study the impact of graphene channel over conventional silicon on DC/analog and RF performance of DG dual-material-gate VTFET
|
Zohmingliana,
|
|
|
128 |
C |
p.
|
artikel
|
| 34 |
Theoretical and numerical investigation of a new 3-axis SU-8 MEMS piezoresistive accelerometer
|
Khlifi, Awatef
|
|
|
128 |
C |
p.
|
artikel
|
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