| nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
| 1 |
A fast and reliable method used to investigate the size-dependent retention lifetime of a phase-change line cell
|
Goux, L.
|
|
2011
|
58 |
1 |
p. 17-22
6 p.
|
artikel
|
| 2 |
A 1.0V power supply, 9.3GB/s write speed, Single-Cell Self-Boost program scheme for high performance ferroelectric NAND flash SSD
|
Miyaji, Kousuke
|
|
2011
|
58 |
1 |
p. 34-41
8 p.
|
artikel
|
| 3 |
Comparative study of non-polar switching behaviors of NiO- and HfO2-based oxide resistive-RAMs
|
Jousseaume, V.
|
|
2011
|
58 |
1 |
p. 62-67
6 p.
|
artikel
|
| 4 |
Control of filament size and reduction of reset current below 10μA in NiO resistance switching memories
|
Nardi, F.
|
|
2011
|
58 |
1 |
p. 42-47
6 p.
|
artikel
|
| 5 |
Demonstration of Conductive Bridging Random Access Memory (CBRAM) in logic CMOS process
|
Gopalan, C.
|
|
2011
|
58 |
1 |
p. 54-61
8 p.
|
artikel
|
| 6 |
Editorial Board
|
|
|
2011
|
58 |
1 |
p. IFC-
1 p.
|
artikel
|
| 7 |
Empirical investigation of SET seasoning effects in Phase Change Memory arrays
|
Zambelli, C.
|
|
2011
|
58 |
1 |
p. 23-27
5 p.
|
artikel
|
| 8 |
Flexible and transparent ReRAM with GZO memory layer and GZO-electrodes on large PEN sheet
|
Kinoshita, K.
|
|
2011
|
58 |
1 |
p. 48-53
6 p.
|
artikel
|
| 9 |
Foreword
|
Deleruyelle, Damien
|
|
2011
|
58 |
1 |
p. 1-
1 p.
|
artikel
|
| 10 |
Highly-scalable disruptive reading and restoring scheme for Gb-scale SPRAM and beyond
|
Takemura, R.
|
|
2011
|
58 |
1 |
p. 28-33
6 p.
|
artikel
|
| 11 |
Impact of Ge–Sb–Te compound engineering on the set operation performance in phase-change memories
|
Boniardi, Mattia
|
|
2011
|
58 |
1 |
p. 11-16
6 p.
|
artikel
|
| 12 |
Investigation of charge-trap memories with AlN based band engineered storage layers
|
Molas, G.
|
|
2011
|
58 |
1 |
p. 68-74
7 p.
|
artikel
|
| 13 |
Low power options for 32nm always-on SRAM architecture
|
Hamouche, Lahcen
|
|
2011
|
58 |
1 |
p. 83-95
13 p.
|
artikel
|
| 14 |
Modeling of program, erase and retention characteristics of charge-trap gate all around memories
|
Nowak, Etienne
|
|
2011
|
58 |
1 |
p. 75-82
8 p.
|
artikel
|
| 15 |
Post-manufacturing, 17-times acceptable raw bit error rate enhancement, dynamic codeword transition ECC scheme for highly reliable solid-state drives, SSDs
|
Tanakamaru, Shuhei
|
|
2011
|
58 |
1 |
p. 2-10
9 p.
|
artikel
|
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