| nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
| 1 |
A Circuit for Concurrent Detection of Soft and Timing Errors in Digital CMOS ICs
|
S. Matakias
|
|
2004
|
20 |
5 |
p. 523-531
9 p.
|
artikel
|
| 2 |
A Circuit for Concurrent Detection of Soft and Timing Errors in Digital CMOS ICs
|
Matakias, S.
|
|
2004
|
20 |
5 |
p. 523-531
|
artikel
|
| 3 |
An Analog Checker with Input-Relative Tolerance for Duplicate Signals
|
Haralampos-G. D. Stratigopoulos
|
|
2004
|
20 |
5 |
p. 479-488
10 p.
|
artikel
|
| 4 |
An Analog Checker with Input-Relative Tolerance for Duplicate Signals
|
Stratigopoulos, Haralampos-G. D.
|
|
2004
|
20 |
5 |
p. 479-488
|
artikel
|
| 5 |
A New Approach to the Analysis of Single Event Transients in VLSI Circuits
|
M. Sonza Reorda
|
|
2004
|
20 |
5 |
p. 511-521
11 p.
|
artikel
|
| 6 |
A New Approach to the Analysis of Single Event Transients in VLSI Circuits
|
Reorda, M. Sonza
|
|
2004
|
20 |
5 |
p. 511-521
|
artikel
|
| 7 |
A Two-Level Power-Grid Model for Transient Current Testing Evaluation
|
B. Alorda
|
|
2004
|
20 |
5 |
p. 543-552
10 p.
|
artikel
|
| 8 |
A Two-Level Power-Grid Model for Transient Current Testing Evaluation
|
Alorda, B.
|
|
2004
|
20 |
5 |
p. 543-552
|
artikel
|
| 9 |
Design of Embedded Self-Testing Checkers for t-UED and BUED Codes
|
Steffen Tarnick
|
|
2004
|
20 |
5 |
p. 465-477
13 p.
|
artikel
|
| 10 |
Design of Embedded Self-Testing Checkers for t-UED and BUED Codes
|
Tarnick, Steffen
|
|
2004
|
20 |
5 |
p. 465-477
|
artikel
|
| 11 |
Editorial
|
Vishwani D. Agrawal
|
|
2004
|
20 |
5 |
p. 459-459
1 p.
|
artikel
|
| 12 |
Editorial
|
Agrawal, Vishwani D.
|
|
2004
|
20 |
5 |
p. 459
|
artikel
|
| 13 |
Efficient Realization of Parity Prediction Functions in FPGAs
|
Seok-Bum Ko
|
|
2004
|
20 |
5 |
p. 489-499
11 p.
|
artikel
|
| 14 |
Efficient Realization of Parity Prediction Functions in FPGAs
|
Ko, Seok-Bum
|
|
2004
|
20 |
5 |
p. 489-499
|
artikel
|
| 15 |
Error Detection Enhancement in COTS Superscalar Processors with Performance Monitoring Features
|
Amir Rajabzadeh
|
|
2004
|
20 |
5 |
p. 553-567
15 p.
|
artikel
|
| 16 |
Error Detection Enhancement in COTS Superscalar Processors with Performance Monitoring Features
|
Rajabzadeh, Amir
|
|
2004
|
20 |
5 |
p. 553-567
|
artikel
|
| 17 |
Guest Editorial
|
Cecilia Metra
|
|
2004
|
20 |
5 |
p. 463-463
1 p.
|
artikel
|
| 18 |
Guest Editorial
|
Metra, Cecilia
|
|
2004
|
20 |
5 |
p. 463
|
artikel
|
| 19 |
IC Cost Reduction by Applying Embedded Fault Tolerance for Soft Errors
|
André K. Nieuwland
|
|
2004
|
20 |
5 |
p. 533-542
10 p.
|
artikel
|
| 20 |
IC Cost Reduction by Applying Embedded Fault Tolerance for Soft Errors
|
Nieuwland, André K.
|
|
2004
|
20 |
5 |
p. 533-542
|
artikel
|
| 21 |
Model for Transient Fault Susceptibility of Combinational Circuits
|
Martin Omaña
|
|
2004
|
20 |
5 |
p. 501-509
9 p.
|
artikel
|
| 22 |
Model for Transient Fault Susceptibility of Combinational Circuits
|
Omaña, Martin
|
|
2004
|
20 |
5 |
p. 501-509
|
artikel
|
| 23 |
Test Technology Technical Council Newsletter
|
P. Prinetto
|
|
2004
|
20 |
5 |
p. 461-462
2 p.
|
artikel
|
| 24 |
Test Technology Technical Council Newsletter
|
Prinetto, P.
|
|
2004
|
20 |
5 |
p. 461-462
|
artikel
|
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