nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
1 |
An integrated system for developing regular array designs
|
Guo, Shaori |
|
2001 |
47 |
3-4 |
p. 315-337 23 p. |
artikel |
2 |
Constraints-driven design space exploration for distributed embedded systems
|
Kuchcinski, Krzysztof |
|
2001 |
47 |
3-4 |
p. 241-261 21 p. |
artikel |
3 |
Design-for-testability to achieve complete coverage of delay faults in standard full scan circuits
|
Pomeranz, Irith |
|
2001 |
47 |
3-4 |
p. 357-373 17 p. |
artikel |
4 |
Execution cost interval refinement in static software analysis
|
Wolf, Fabian |
|
2001 |
47 |
3-4 |
p. 339-356 18 p. |
artikel |
5 |
Grammar-based design of embedded systems
|
Öberg, Johnny |
|
2001 |
47 |
3-4 |
p. 225-240 16 p. |
artikel |
6 |
High-level synthesis using hierarchical conditional dependency graphs in the CODESIS system
|
Kountouris, Apostolos A. |
|
2001 |
47 |
3-4 |
p. 293-313 21 p. |
artikel |
7 |
Kernel scheduling techniques for efficient solution space exploration in reconfigurable computing
|
Maestre, Rafael |
|
2001 |
47 |
3-4 |
p. 277-292 16 p. |
artikel |
8 |
Modern methods and tools in digital system design
|
Jóźwiak, Lech |
|
2001 |
47 |
3-4 |
p. 197-200 4 p. |
artikel |
9 |
POPS: A tool for delay/power performance optimization
|
Azémard, N. |
|
2001 |
47 |
3-4 |
p. 375-382 8 p. |
artikel |
10 |
Quality-driven design in the system-on-a-chip era: Why and how?
|
Jóźwiak, Lech |
|
2001 |
47 |
3-4 |
p. 201-224 24 p. |
artikel |
11 |
V-SAT: A visual specification and analysis tool for system-on-chip exploration
|
Khare, Asheesh |
|
2001 |
47 |
3-4 |
p. 263-275 13 p. |
artikel |