| nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
| 1 |
A 10-bit 100-MS/s 5.23-mW SAR ADC in 0.18-μm CMOS
|
Ma, Rui
|
|
|
78 |
C |
p. 63-72
|
artikel
|
| 2 |
A dual mode step-down switched-capacitor DC-DC converter with adaptive switch width modulation
|
Liu, Lianxi
|
|
|
78 |
C |
p. 114-123
|
artikel
|
| 3 |
An adaptive neural-fuzzy approach for microfluidic droplet size prediction
|
Lashkaripour, Ali
|
|
|
78 |
C |
p. 73-80
|
artikel
|
| 4 |
A nullor approach to the design of analog circuits for a desirable performance
|
Radhakrishnan, Rohith Krishnan
|
|
|
78 |
C |
p. 54-62
|
artikel
|
| 5 |
An ultra-low power multiplier using multi-valued adiabatic logic in 65 nm CMOS process
|
Yuejun, Zhang
|
|
|
78 |
C |
p. 26-34
|
artikel
|
| 6 |
A single chip for 4-channel LED dimming driver of 240 W true color display with SPI control
|
Hsia, Shih-Chang
|
|
|
78 |
C |
p. 16-25
|
artikel
|
| 7 |
Bandwidth expanding technology for dynamic crosstalk aware single-walled and multi-walled carbon nanotube bundle interconnects
|
Zhao, Songjie
|
|
|
78 |
C |
p. 101-113
|
artikel
|
| 8 |
Editorial Board
|
|
|
|
78 |
C |
p. ii
|
artikel
|
| 9 |
High performance CMOS level up shifter with full–scale 1.2 V output voltage
|
García, José–Carlos
|
|
|
78 |
C |
p. 11-15
|
artikel
|
| 10 |
Investigation of VDMOSFET's switching power dissipation changes under constant electrical stress
|
Sezgin-Ugranlı, Hatice Gül
|
|
|
78 |
C |
p. 81-87
|
artikel
|
| 11 |
On the complexity of design tasks for Digital Microfluidic Biochips
|
Keszocze, Oliver
|
|
|
78 |
C |
p. 35-45
|
artikel
|
| 12 |
Optimization for offset and kickback-noise in novel CMOS double-tail dynamic comparator: A low-power, high-speed design approach using bulk-driven load
|
Dubey, Avaneesh K.
|
|
|
78 |
C |
p. 1-10
|
artikel
|
| 13 |
Pseudo-analytical model for calculation of flat circular inductors with rectangular cross-section
|
Ferrer Penalver, Pedro Luis
|
|
|
78 |
C |
p. 46-53
|
artikel
|
| 14 |
Statically triggered 3×VDD-Tolerant ESD detection circuit in a 90-nm low-voltage CMOS process
|
Yang, Zhaonian
|
|
|
78 |
C |
p. 88-93
|
artikel
|
| 15 |
Static noise margin trade-offs for 6T-SRAM cell sizing in 28 nm UTBB FD-SOI CMOS technology
|
Olivera, Fabián
|
|
|
78 |
C |
p. 94-100
|
artikel
|
Tijdschrift beschrijving