| nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
| 1 |
A 77GHz FMCW radar transmitter with reconfigurable power amplifier in 65nm CMOS
|
Jia, Haikun
|
|
|
45 |
7 |
p. 898-903
|
artikel
|
| 2 |
A highly miniaturized LTCC dual-band UWB filter using independent transmission zeros and lowpass filters
|
Cheon, Seong Jong
|
|
|
45 |
7 |
p. 886-892
|
artikel
|
| 3 |
A low-complexity low-spurs digital architecture for wideband PLL applications
|
Zhang, Ye
|
|
|
45 |
7 |
p. 842-847
|
artikel
|
| 4 |
A 0.13 μ m dual-band common-gate LNA using active post distortion for mobile WiMAX
|
Zokaei, Abolfazl
|
|
|
45 |
7 |
p. 921-929
|
artikel
|
| 5 |
A new 0.35μm CMOS electronic interface for wide range floating capacitive and grounded/floating resistive sensor applications
|
De Marcellis, Andrea
|
|
|
45 |
7 |
p. 910-920
|
artikel
|
| 6 |
A novel simulation methodology for full chip-package thermo-mechanical reliability investigations
|
Karunamurthy, Balamurugan
|
|
|
45 |
7 |
p. 966-971
|
artikel
|
| 7 |
A single-channel 8-bit 660MS/s asynchronous SAR ADC with pre-settling procedure in 65nm CMOS
|
Zhu, Zhangming
|
|
|
45 |
7 |
p. 880-885
|
artikel
|
| 8 |
A VCO-based phase-expanding conversion designed for time-domain data converters
|
Kao, Shao-Ku
|
|
|
45 |
7 |
p. 835-841
|
artikel
|
| 9 |
13-bit GaAs serial-to-parallel converter with compact layout for core-chip applications
|
Pirola, Marco
|
|
|
45 |
7 |
p. 864-869
|
artikel
|
| 10 |
Current-controlled switches for HV SoI processes
|
Jankowski, M.
|
|
|
45 |
7 |
p. 931-945
|
artikel
|
| 11 |
Current-mode signal processing implementation in HV SoI integrated systems
|
Jankowski, M.
|
|
|
45 |
7 |
p. 946-959
|
artikel
|
| 12 |
Dedicated thermal emulator for analysis of thermal coupling in many-core processors
|
Szermer, M.
|
|
|
45 |
7 |
p. 960-965
|
artikel
|
| 13 |
Editorial board
|
|
|
|
45 |
7 |
p. i
|
artikel
|
| 14 |
Fabrication and characterization of a planar interleaved micro-transformer with magnetic core
|
Kahlouche, F.
|
|
|
45 |
7 |
p. 893-897
|
artikel
|
| 15 |
High-speed reduced-leakage SRAM memory cell design techniques for low-power 65nm FD-SOI/SON CMOS technology
|
Saha, Deepon
|
|
|
45 |
7 |
p. 848-856
|
artikel
|
| 16 |
Hybrid time and hardware redundancy to mitigate SEU effects on SRAM-FPGAs: Case study over the MicroLAN protocol
|
Omidi Gosheblagh, Reza
|
|
|
45 |
7 |
p. 870-879
|
artikel
|
| 17 |
Investigation on reliability of interconnects in 3D heterogeneous systems by ageing beam resonance method
|
Janczyk, G.
|
|
|
45 |
7 |
p. 981-987
|
artikel
|
| 18 |
Low-power level converting flip-flop with a conditional clock technique in dual supply systems
|
Shen, Jizhong
|
|
|
45 |
7 |
p. 857-863
|
artikel
|
| 19 |
Measuring resistivity of silicon nanowire using pseudo-random binary sequence injection
|
Roinila, Tomi
|
|
|
45 |
7 |
p. 976-980
|
artikel
|
| 20 |
Nanoelectronic SET-based core for network-on-chip architectures
|
Pês, B.S.
|
|
|
45 |
7 |
p. 972-975
|
artikel
|
| 21 |
Special Section NANOTECH 2013
|
Courtois, Bernard
|
|
|
45 |
7 |
p. 930
|
artikel
|
| 22 |
The optimal design of the thermal spreading on high power LEDs
|
Hsieh, Jui-Ching
|
|
|
45 |
7 |
p. 904-909
|
artikel
|
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