| nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
| 1 |
A Methodology for Rapid Prototyping Peak-Constrained Least-Squares Bit-Serial Finite Impulse Response Filters in FPGAs
|
Carreira, Alex
|
|
2003
|
2003 |
6 |
p. 1-10
|
artikel
|
| 2 |
A Methodology for Rapid Prototyping Peak-Constrained Least-Squares Bit-Serial Finite Impulse Response Filters in FPGAs
|
Carreira, Alex
|
|
|
2003 |
6 |
|
artikel
|
| 3 |
An FPGA Implementation of-Regular Low-Density Parity-Check Code Decoder
|
Zhang, Tong
|
|
2003
|
2003 |
6 |
p. 1-13
|
artikel
|
| 4 |
An FPGA Implementation of-Regular Low-Density Parity-Check Code Decoder
|
Zhang, Tong
|
|
|
2003 |
6 |
|
artikel
|
| 5 |
A Partitioning Methodology That Optimises the Area on Reconfigurable Real-Time Embedded Systems
|
Tanougast, Camel
|
|
2003
|
2003 |
6 |
p. 1-8
|
artikel
|
| 6 |
A Partitioning Methodology That Optimises the Area on Reconfigurable Real-Time Embedded Systems
|
Tanougast, Camel
|
|
|
2003 |
6 |
|
artikel
|
| 7 |
A Rapid Prototyping Environment for Wireless Communication Embedded Systems
|
Jones, Bryan A.
|
|
2003
|
2003 |
6 |
p. 1-12
|
artikel
|
| 8 |
A Rapid Prototyping Environment for Wireless Communication Embedded Systems
|
Jones, Bryan A.
|
|
|
2003 |
6 |
|
artikel
|
| 9 |
Design and Implementation of Digital Linear Control Systems on Reconfigurable Hardware
|
Bednara, Marcus
|
|
2003
|
2003 |
6 |
p. 1-9
|
artikel
|
| 10 |
Design and Implementation of Digital Linear Control Systems on Reconfigurable Hardware
|
Bednara, Marcus
|
|
|
2003 |
6 |
|
artikel
|
| 11 |
Designing BEE: A Hardware Emulation Engine for Signal Processing in Low-Power Wireless Applications
|
Kuusilinna, Kimmo
|
|
2003
|
2003 |
6 |
p. 1-12
|
artikel
|
| 12 |
Designing BEE: A Hardware Emulation Engine for Signal Processing in Low-Power Wireless Applications
|
Kuusilinna, Kimmo
|
|
|
2003 |
6 |
|
artikel
|
| 13 |
Editorial
|
Bayoumi, Magdy
|
|
2003
|
2003 |
6 |
p. 1-3
|
artikel
|
| 14 |
Editorial
|
Bayoumi, Magdy
|
|
|
2003 |
6 |
|
artikel
|
| 15 |
How Rapid is Rapid Prototyping? Analysis of ESPADON Programme Results
|
Madahar, Bob K.
|
|
2003
|
2003 |
6 |
p. 1-14
|
artikel
|
| 16 |
How Rapid is Rapid Prototyping? Analysis of ESPADON Programme Results
|
Madahar, Bob K.
|
|
|
2003 |
6 |
|
artikel
|
| 17 |
Logic Foundry: Rapid Prototyping for FPGA-Based DSP Systems
|
Spivey, Gary
|
|
2003
|
2003 |
6 |
p. 1-15
|
artikel
|
| 18 |
Logic Foundry: Rapid Prototyping for FPGA-Based DSP Systems
|
Spivey, Gary
|
|
|
2003 |
6 |
|
artikel
|
| 19 |
Memory-Optimized Software Synthesis from Dataflow Program Graphs with Large Size Data Samples
|
Oh, Hyunok
|
|
2003
|
2003 |
6 |
p. 1-16
|
artikel
|
| 20 |
Memory-Optimized Software Synthesis from Dataflow Program Graphs with Large Size Data Samples
|
Oh, Hyunok
|
|
|
2003 |
6 |
|
artikel
|
| 21 |
Rapid Prototyping of Field Programmable Gate Array-Based Discrete Cosine Transform Approximations
|
Fox, Trevor W.
|
|
2003
|
2003 |
6 |
p. 1-12
|
artikel
|
| 22 |
Rapid Prototyping of Field Programmable Gate Array-Based Discrete Cosine Transform Approximations
|
Fox, Trevor W.
|
|
|
2003 |
6 |
|
artikel
|
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