nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
1 |
A leakage-energy-reduction technique for cache memories in embedded processors
|
Fujii, Seiichiri |
|
2006 |
2 |
1 |
p. 49-55 |
artikel |
2 |
An efficient runtime instruction block verification for secure embedded systems
|
Milenkovic, Aleksandar |
|
2006 |
2 |
1 |
p. 57-76 |
artikel |
3 |
Application partitioning on programmable platforms using the ant colony optimization
|
Wang, Gang |
|
2006 |
2 |
1 |
p. 119-136 |
artikel |
4 |
Compiler-guided next sub-bank prediction for reducing instruction cache leakage energy
|
Zhang, Wei |
|
2006 |
2 |
1 |
p. 35-48 |
artikel |
5 |
Embedded processors and systems: Architectural issues and solutions for emerging applications
|
Bartolini, S. |
|
2006 |
2 |
1 |
p. 1-3 |
artikel |
6 |
Frame packing algorithms for automotive applications
|
Saket, Rishi |
|
2006 |
2 |
1 |
p. 93-102 |
artikel |
7 |
Instruction Reuse in SPEC, media and packet processing benchmarks: A comparative study of power, performance and related microarchitectural optimizations
|
Surendra, G. |
|
2006 |
2 |
1 |
p. 15-34 |
artikel |
8 |
Load squared: Adding logic close to memory to reduce the latency of indirect loads in embedded and general systems
|
Yehia, Sami |
|
2006 |
2 |
1 |
p. 5-14 |
artikel |
9 |
SH-X: An embedded processor core for consumer appliances
|
Arakawa, F. |
|
2006 |
2 |
1 |
p. 83-90 |
artikel |
10 |
The impact of traffic aggregation on the memory performance of networking applications
|
VerdĂș, Javier |
|
2006 |
2 |
1 |
p. 77-82 |
artikel |
11 |
Time-constrained loop scheduling with minimal resources
|
O'Neil, Timothy W. |
|
2006 |
2 |
1 |
p. 103-117 |
artikel |