| nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
| 1 |
A/D Precision Requirements for Digital Ultra-Wideband Radio Receivers
|
Newaskar, Puneet P.
|
|
2005
|
39 |
1-2 |
p. 175-188
|
artikel
|
| 2 |
A Scalable System Architecture for High-Throughput Turbo-Decoders
|
Thul, Michael J.
|
|
2005
|
39 |
1-2 |
p. 63-77
|
artikel
|
| 3 |
Energy Efficient Memory Architecture for High Speed Decoding of Block Turbo-Codes with the Fang-Buda Algorithm
|
Bougard, B.
|
|
2005
|
39 |
1-2 |
p. 79-92
|
artikel
|
| 4 |
Energy Efficient VLSI Architecture for Linear Turbo Equalizer
|
Lee, Seok-Jun
|
|
2005
|
39 |
1-2 |
p. 49-62
|
artikel
|
| 5 |
Flexible Implementation of a WCDMA Rake Receiver
|
Harju, Lasse
|
|
2005
|
39 |
1-2 |
p. 147-160
|
artikel
|
| 6 |
Guest Editorial
|
Shanbhag, Naresh
|
|
2005
|
39 |
1-2 |
p. 5-6
|
artikel
|
| 7 |
High Speed FPGA-Based Implementations of Delayed-LMS Filters
|
Yi, Y.
|
|
2005
|
39 |
1-2 |
p. 113-131
|
artikel
|
| 8 |
Interleaving on Parallel DSP Architectures
|
Richter, Thomas
|
|
2005
|
39 |
1-2 |
p. 161-173
|
artikel
|
| 9 |
On the Performance and Implementation Issues of Interleaved Single Parity Check Turbo Product Codes
|
Chen, Yanni
|
|
2005
|
39 |
1-2 |
p. 35-47
|
artikel
|
| 10 |
Optimum Downlink Power Control of a DS-CDMA System via Convex Programming
|
Tung, Tai-Lai
|
|
2005
|
39 |
1-2 |
p. 133-146
|
artikel
|
| 11 |
Power-Aware 3D Computer Graphics Rendering
|
Euh, Jeongseon
|
|
2005
|
39 |
1-2 |
p. 15-33
|
artikel
|
| 12 |
QVGA/CIF Resolution MPEG-4 Video Codec Based on a Low-Power and General-Purpose DSP
|
Hatabu, Atsushi
|
|
2005
|
39 |
1-2 |
p. 7-14
|
artikel
|
| 13 |
Towards a VLSI Architecture for Interpolation-Based Soft-Decision Reed-Solomon Decoders
|
Gross, Warren J.
|
|
2005
|
39 |
1-2 |
p. 93-111
|
artikel
|
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