nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
1 |
An FPGA-Based Approach for Speeding-Up Fault Injection Campaigns on Safety-Critical Circuits
|
P. Civera |
|
2002 |
18 |
3 |
p. 261-271 11 p. |
artikel |
2 |
An FPGA-Based Approach for Speeding-Up Fault Injection Campaigns on Safety-Critical Circuits
|
Civera, P. |
|
2002 |
18 |
3 |
p. 261-271 |
artikel |
3 |
CMOS Differential and Absolute Thermal Sensors
|
Ashish Syal |
|
2002 |
18 |
3 |
p. 295-304 10 p. |
artikel |
4 |
CMOS Differential and Absolute Thermal Sensors
|
Syal, Ashish |
|
2002 |
18 |
3 |
p. 295-304 |
artikel |
5 |
Design and Test of a Certifiable ASIC for a Safety-Critical Gas Burner Control System
|
F.M. Gonçalves |
|
2002 |
18 |
3 |
p. 285-294 10 p. |
artikel |
6 |
Design and Test of a Certifiable ASIC for a Safety-Critical Gas Burner Control System
|
Gonçalves, F.M. |
|
2002 |
18 |
3 |
p. 285-294 |
artikel |
7 |
Editorial
|
Vishwani D. Agrawal |
|
2002 |
18 |
3 |
p. 255-255 1 p. |
artikel |
8 |
Editorial
|
Agrawal, Vishwani D. |
|
2002 |
18 |
3 |
p. 255 |
artikel |
9 |
Guest Editorial
|
Dimitris Nikolos |
|
2002 |
18 |
3 |
p. 259-260 2 p. |
artikel |
10 |
Guest Editorial
|
Nikolos, Dimitris |
|
2002 |
18 |
3 |
p. 259-260 |
artikel |
11 |
Mixed-Signal Circuit Classification in a Pseudo-Random Testing Scheme
|
C. Marzocca |
|
2002 |
18 |
3 |
p. 333-342 10 p. |
artikel |
12 |
Mixed-Signal Circuit Classification in a Pseudo-Random Testing Scheme
|
Marzocca, C. |
|
2002 |
18 |
3 |
p. 333-342 |
artikel |
13 |
On-the-Fly Reseeding A New Reseeding Technique for Test-Per-Clock BIST
|
Emmanouil Kalligeros |
|
2002 |
18 |
3 |
p. 315-332 18 p. |
artikel |
14 |
On-the-Fly Reseeding: A New Reseeding Technique for Test-Per-Clock BIST
|
Kalligeros, Emmanouil |
|
2002 |
18 |
3 |
p. 315-332 |
artikel |
15 |
Path-Based Error Coverage Prediction
|
Joakim Aidemark |
|
2002 |
18 |
3 |
p. 343-349 7 p. |
artikel |
16 |
Path-Based Error Coverage Prediction
|
Aidemark, Joakim |
|
2002 |
18 |
3 |
p. 343-349 |
artikel |
17 |
Reliability Properties Assessment at System Level A Co-Design Framework
|
C. Bolchini |
|
2002 |
18 |
3 |
p. 351-356 6 p. |
artikel |
18 |
Reliability Properties Assessment at System Level: A Co-Design Framework
|
Bolchini, C. |
|
2002 |
18 |
3 |
p. 351-356 |
artikel |
19 |
Single Output Distributed Two-Rail Checker with Diagnosing Capabilities for Bus Based Self-Checking Architectures
|
Michele Favalli |
|
2002 |
18 |
3 |
p. 273-283 11 p. |
artikel |
20 |
Single Output Distributed Two-Rail Checker with Diagnosing Capabilities for Bus Based Self-Checking Architectures
|
Favalli, Michele |
|
2002 |
18 |
3 |
p. 273-283 |
artikel |
21 |
Test Technology Technical Council Newsletter
|
André Ivanov |
|
2002 |
18 |
3 |
p. 257-258 2 p. |
artikel |
22 |
Test Technology Technical Council Newsletter
|
Ivanov, André |
|
2002 |
18 |
3 |
p. 257-258 |
artikel |
23 |
Using a WLFSR to Embed Test Pattern Pairs in Minimum Time
|
Dimitri Kagaris |
|
2002 |
18 |
3 |
p. 305-313 9 p. |
artikel |
24 |
Using a WLFSR to Embed Test Pattern Pairs in Minimum Time
|
Kagaris, Dimitri |
|
2002 |
18 |
3 |
p. 305-313 |
artikel |