nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
1 |
A 90–96 GHz CMOS down-conversion mixer with high conversion gain and excellent LO–RF isolation
|
Lin, Yo-Sheng |
|
2017 |
93 |
1 |
p. 49-59 |
artikel |
2 |
A low-power low-jitter DLL with a differential closed-loop duty cycle corrector
|
Jalalifar, Majid |
|
2017 |
93 |
1 |
p. 149-155 |
artikel |
3 |
A multi-band low noise amplifier with strong immunity to interferers
|
Zahir, Zaira |
|
2017 |
93 |
1 |
p. 13-27 |
artikel |
4 |
A New Method Modifying Single Miller Feedforward Frequency Compensation to Drive Large Capacitive Loads: Putting an Attenuator in the Path
|
Chaharmahali, Iman |
|
2017 |
93 |
1 |
p. 61-70 |
artikel |
5 |
A 0.5-V all-digital clock-deskew buffer with I/Q phase outputs
|
Tu, Yo-Hao |
|
2017 |
93 |
1 |
p. 157-167 |
artikel |
6 |
Body controlled threshold voltage shifting variable gain current mirror
|
Faraji Baghtash, Hassan |
|
2017 |
93 |
1 |
p. 115-121 |
artikel |
7 |
Bulk-driven class AB fully-balanced differential difference amplifier
|
Khateb, Fabian |
|
2017 |
93 |
1 |
p. 179-187 |
artikel |
8 |
Continuous-time analog filter with passband constant IIP3 based on common-gate amplifier
|
Matteis, Marcello De |
|
2017 |
93 |
1 |
p. 99-106 |
artikel |
9 |
Four Input Single Output based third order universal filter using Four Terminal Floating Nullor
|
Tarunkumar, Huirem |
|
2017 |
93 |
1 |
p. 87-98 |
artikel |
10 |
Fully digital fast transient phase-locked digital LDO-embedded-MDLL for DVFS applications
|
Akram, Muhammad Abrar |
|
2017 |
93 |
1 |
p. 123-136 |
artikel |
11 |
94 GHz down-conversion mixer with gain enhanced Gilbert cell in 90 nm CMOS
|
Lin, Yo-Sheng |
|
2017 |
93 |
1 |
p. 1-11 |
artikel |
12 |
High-temperature characterisation and analysis of leakage-current-compensated, low-power bandgap temperature sensors
|
Nilsson, Joakim |
|
2017 |
93 |
1 |
p. 137-147 |
artikel |
13 |
Low leakage and high CMRR CMOS differential amplifier for biomedical application
|
Jain, Prateek |
|
2017 |
93 |
1 |
p. 71-85 |
artikel |
14 |
Low power PLL with reduced reference spur realized with glitch-free linear PFD and current splitting CP
|
Abdul Majeed, K. K. |
|
2017 |
93 |
1 |
p. 29-39 |
artikel |
15 |
Low power VLSI architecture design of BMC, BPSC and PC schemes
|
Rajakumar, G. |
|
2017 |
93 |
1 |
p. 169-178 |
artikel |
16 |
3.6 mw low power wireless RF receiver front end using creative current recycle technique
|
Damodara Venkata Appala Naidu, T. |
|
2017 |
93 |
1 |
p. 41-47 |
artikel |
17 |
On gm-boosted follower-amplifier and its novel circuit transformation based mid-band derivations
|
Rezaul Hasan, S. M. |
|
2017 |
93 |
1 |
p. 107-114 |
artikel |