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23 results found

no	title	author	magazine	year	volume	issue	page(s)	type
1	A 98.1 % CE, 100 mA MLC multi-reference output all digital LDO with fast settling and digital self calibration for DVFS and multi-VDD applications	Kaedi, S.		2016	89	2	p. 437-450	article
2	A compact broadband stacked medium power amplifier in standard 65 nm CMOS technology	Tarar, Mohsin Mumtaz		2016	89	2	p. 327-335	article
3	A continuous-time delta-sigma ADC with integrated digital background calibration	Tan, Siyu		2016	89	2	p. 273-282	article
4	A 70.7-dB SNDR 100-kS/s 14-b SAR ADC with attenuation capacitance calibration in 0.35-µm CMOS	Brenna, Stefano		2016	89	2	p. 357-371	article
5	A 90 % efficiency, 250 MHz on-chip adaptive switched capacitor based DC–DC converter	Jagannadha Naidu, K.		2016	89	2	p. 451-460	article
6	A low-power thermal-based sensor system for low air flow detection	Arifuzzman, A. K. M.		2016	89	2	p. 425-436	article
7	A 10.2 mW multi-mode continuous-time ΔΣ ADC with 70–87 dB DR and 0.7–10 MHz bandwidth for TD-SCDMA and LTE digital receivers	Xu, Ken		2016	89	2	p. 395-410	article
8	Analysis and design of class-O RF power amplifiers for wireless communication systems	Khan, Muhammad Abdullah		2016	89	2	p. 317-325	article
9	Analysis and design of power and efficiency in third-order matching networks for switched-capacitor power-amplifiers	Passamani, Antonio		2016	89	2	p. 307-315	article
10	A novel redundant cyclic method to improve the SFDR of SAR ADC	Fan, Hua		2016	89	2	p. 485-492	article
11	A SAR ADC with current steering DAC and voltage input	Panov, Georgi		2016	89	2	p. 411-415	article
12	Automatic tuning of digitally-controllable positive-feedback OTAs in continuous-time sigma–delta modulators	Irfansyah, Astria Nur		2016	89	2	p. 469-483	article
13	A 154-μW 80-dB SNDR analog-to-digital front-end for digital hearing aids	Im, Saemin		2016	89	2	p. 383-393	article
14	A wide band fractional-N digital PLL with a noise shaping 2-D time to digital converter for LTE-A applications	Mahmoud, Ahmed		2016	89	2	p. 337-345	article
15	Design and validation of a 10-bit current mode SAR ADC with 58.4 dB SFDR at 50 MS/s in 90 nm CMOS	Elkafrawy, Abdelrahman		2016	89	2	p. 283-295	article
16	Energy-efficient common-mode voltage switching scheme for SAR ADCs	Gao, Ji		2016	89	2	p. 499-506	article
17	1.45 GHz differential dual band ring based digitally-controlled oscillator with a reconfigurable delay element in 0.18 μm CMOS process	Pahlavan, S.		2016	89	2	p. 461-467	article
18	High-efficiency peak-current-control non-inverting buck–boost converter using mode selection for single Ni–MH cell battery operation	Kim, Jong-Seok		2016	89	2	p. 297-306	article
19	Low power, low noise, compact amperometric circuit for three-terminal glucose biosensor	Karandikar, Niranjan		2016	89	2	p. 417-424	article
20	Practical analysis of clock jitter reduction techniques under power supply noise for continuous-time delta-sigma modulators	Tang, Hua		2016	89	2	p. 373-381	article
21	Special issue: selected papers from the 1st NORCAS conference (2015 Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium on System-on-Chip (SoC))	Aunet, Snorre		2016	89	2	p. 271-272	article
22	Ultra low-power, -area and -frequency CMOS thyristor based oscillator for autonomous microsystems	Funke, Dominic A.		2016	89	2	p. 347-356	article
23	Wideband ring oscillator with switched resistor array for low tuning sensitivity	Gao, Haijun		2016	89	2	p. 493-498	article

23 results found

Koninklijke Bibliotheek - National Library of the Netherlands