| no |
title |
author |
magazine |
year |
volume |
issue |
page(s) |
type |
| 1 |
A discrete time continuous level VLSI architecture in current mode to implement Discrete Haar Wavelet Transform
|
Reddy, Ankireddypalli Subhakumar
|
|
2012
|
73 |
1 |
p. 353-362
|
article
|
| 2 |
A dual mode 2.4-GHz CMOS low noise amplifier employing body biasing
|
Aya, Mabrouki
|
|
2011
|
73 |
1 |
p. 161-168
|
article
|
| 3 |
A 5.28-Gb/s serializer ASIC for uncompressed long-haul multimedia interconnects
|
Park, Kang-Yeob
|
|
2012
|
73 |
1 |
p. 385-395
|
article
|
| 4 |
A generic low-noise CMOS readout interface for 64 × 64 imaging array with on-chip ADC
|
Jawed, Syed Arsalan
|
|
2012
|
73 |
1 |
p. 273-289
|
article
|
| 5 |
A glitch-corrector circuit for low-spur ADPLLs
|
Zanuso, Marco
|
|
2011
|
73 |
1 |
p. 201-208
|
article
|
| 6 |
A hybrid CT/DT double-sampled SMASH Σ∆ modulator for broadband applications in 90 nm CMOS technology
|
Maghami, Mohammad Hossein
|
|
2012
|
73 |
1 |
p. 101-114
|
article
|
| 7 |
A multiplexer-based digital passive linear counter (PLINCO)
|
Weaver, Skyler
|
|
2012
|
73 |
1 |
p. 143-149
|
article
|
| 8 |
An 8b 250MS/s 0.13µm CMOS ADC using variable references for VGA-to-WUXGA scaler chips
|
Park, Hye-Lim
|
|
2012
|
73 |
1 |
p. 233-242
|
article
|
| 9 |
A new multi-valued neural network for the extraction of lumped models of analog circuits
|
Grasso, F.
|
|
2011
|
73 |
1 |
p. 13-20
|
article
|
| 10 |
An 8.38 fJ/conversion-step 0.6 V 8-b 4.35 MS/s asynchronous SAR ADC in 65 nm CMOS
|
Huang, Guanzhong
|
|
2012
|
73 |
1 |
p. 265-272
|
article
|
| 11 |
An ultra-high-speed direct digital synthesizer with nonlinear DAC and wave correction ROM
|
Wu, Danyu
|
|
2012
|
73 |
1 |
p. 291-300
|
article
|
| 12 |
Automatic topology selection and sizing of class-D loop-filters for minimizing distortion based on an evolutionary optimization kernel
|
Guilherme, David
|
|
2011
|
73 |
1 |
p. 21-32
|
article
|
| 13 |
A 1.2 V 8-bit 1 MS/s SAR ADC with Res–Cap segment DAC for temperature sensor in LTE
|
Wu, H. J.
|
|
2012
|
73 |
1 |
p. 225-232
|
article
|
| 14 |
A 0.5 V high-speed comparator with rail-to-rail input range
|
Kandala, Mallik
|
|
2012
|
73 |
1 |
p. 415-421
|
article
|
| 15 |
Behavioral circuit models of power BAW resonators and filters
|
Constantinescu, F.
|
|
2011
|
73 |
1 |
p. 57-64
|
article
|
| 16 |
Bursting Hodgkin–Huxley model-based ultra-low-power neuromimetic silicon neuron
|
Ma, Qingyun
|
|
2012
|
73 |
1 |
p. 329-337
|
article
|
| 17 |
Calibration technique for SAR analog-to-digital converters
|
Tong, Tao
|
|
2012
|
73 |
1 |
p. 301-309
|
article
|
| 18 |
Context-dependent transformation of Pareto-optimal performance fronts of operational amplifiers
|
Roca, Elisenda
|
|
2011
|
73 |
1 |
p. 65-76
|
article
|
| 19 |
Current buffer compensation topologies for LDOs with improved transient performance
|
Garimella, Annajirao
|
|
2011
|
73 |
1 |
p. 131-142
|
article
|
| 20 |
Designing a mixed electrolytic/ceramic filter capacitor in DC–DC converters
|
De Nardo, Antonietta
|
|
2011
|
73 |
1 |
p. 33-45
|
article
|
| 21 |
Discrete-time chaotic-map truly random number generators: design, implementation, and variability analysis of the zigzag map
|
Nejati, Hamid
|
|
2012
|
73 |
1 |
p. 363-374
|
article
|
| 22 |
Effects of signal PDF on the identification of behavioral polynomial models for multicarrier RF power amplifiers
|
Jebali, Chokri
|
|
2012
|
73 |
1 |
p. 217-224
|
article
|
| 23 |
Exact design of continuous-time sigma-delta modulators with multiple feedback DACs
|
Belotti, Oscar
|
|
2012
|
73 |
1 |
p. 255-264
|
article
|
| 24 |
High-speed driver with built-in self detection functions for off-chip transmission
|
Hsu, Heng-Shou
|
|
2012
|
73 |
1 |
p. 397-408
|
article
|
| 25 |
Implementation of THD-reduction stereo audio amplifier using compensators and sigma–delta modulators
|
Hwang, Yuh-Shyan
|
|
2011
|
73 |
1 |
p. 243-253
|
article
|
| 26 |
Introduction to the special issue on ICECS 2009
|
Hamoui, Anas A.
|
|
2012
|
73 |
1 |
p. 99-100
|
article
|
| 27 |
Introduction to the special issue on SM2ACD 2010
|
Fakhfakh, Mourad
|
|
2011
|
73 |
1 |
p. 1-2
|
article
|
| 28 |
Low phase-noise VCO utilizing modified symmetric load and partial positive feedback for FDSM
|
Cao, Tuan-Vu
|
|
2011
|
73 |
1 |
p. 151-160
|
article
|
| 29 |
Low-power digitally-controlled variable gain attenuator and LNA with high gain dynamic range for sub-GHz ISM bands
|
Périn, Mathieu
|
|
2012
|
73 |
1 |
p. 169-183
|
article
|
| 30 |
Modeling of peak-to-peak core switching noise, output impedance, and decoupling capacitance along a vertical chain of power distribution TSV pairs
|
Ahmad, Waqar
|
|
2011
|
73 |
1 |
p. 311-328
|
article
|
| 31 |
Multiple-input logic circuit design using BiCMOS-based negative differential resistance circuits
|
Gan, Kwang-Jow
|
|
2011
|
73 |
1 |
p. 409-414
|
article
|
| 32 |
Negative current feedback OTA with application to 250 MHz Gm-C filter
|
Lo, Tien-Yu
|
|
2012
|
73 |
1 |
p. 123-129
|
article
|
| 33 |
New CFOA-based sinusoidal oscillators retaining independent control of oscillation frequency even under the influence of parasitic impedances
|
Bhaskar, D. R.
|
|
2012
|
73 |
1 |
p. 427-437
|
article
|
| 34 |
On the design of active inductors with current-controlled voltage sources
|
Fakhfakh, Mourad
|
|
2011
|
73 |
1 |
p. 89-98
|
article
|
| 35 |
Optimum selection of capacitive array for multibit Sigma-Delta modulators without DEM
|
Caracciolo, Hervé
|
|
2012
|
73 |
1 |
p. 115-122
|
article
|
| 36 |
Photovoltaic lighting control with single chip integration
|
Hsia, Shih-Chang
|
|
2011
|
73 |
1 |
p. 375-383
|
article
|
| 37 |
RF integrated inductor modeling and its application to optimization-based design
|
Pereira, P.
|
|
2011
|
73 |
1 |
p. 47-55
|
article
|
| 38 |
Statistical extraction and modeling of inductance considering spatial correlation
|
Hao, Zhigang
|
|
2011
|
73 |
1 |
p. 3-11
|
article
|
| 39 |
Substrate shielding of transformers in millimeter-wave integrated circuits
|
Leite, Bernardo
|
|
2011
|
73 |
1 |
p. 209-215
|
article
|
| 40 |
Superposition properties of the phase noise based on the LTV model
|
Hashemi, S. A.
|
|
2012
|
73 |
1 |
p. 423-426
|
article
|
| 41 |
System- and circuit-level optimization of PLL designs for DVB-T/H receivers
|
Tchamov, Nikolay N.
|
|
2012
|
73 |
1 |
p. 185-200
|
article
|
| 42 |
Variability aware SVM macromodel based design centering of analog circuits
|
Boolchandani, D.
|
|
2011
|
73 |
1 |
p. 77-87
|
article
|
| 43 |
0–30 V common mode range, 120 dB CMRR, and 10 nV/$$ \sqrt {\text{Hz}} $$ noise floor current shunt monitor IC with an embedded ΣΔ modulated digital interface
|
Yeom, Hyunsoo
|
|
2011
|
73 |
1 |
p. 339-351
|
article
|
Journal description