nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
1 |
A 10-bit 50-MS/s redundant SAR ADC with split capacitive-array DAC
|
Arian, Amir |
|
2011 |
71 |
3 |
p. 583-589 |
artikel |
2 |
A 16-channel capacitance-to-period converter for capacitive sensor applications
|
Ramfos, Ioannis |
|
2011 |
71 |
3 |
p. 383-389 |
artikel |
3 |
A CMOS 3.2 Gb/s serial link transceiver, using a new PWAM scheme
|
Ghaderi, Noushin |
|
2011 |
71 |
3 |
p. 421-432 |
artikel |
4 |
A four-quadrant analog multiplier under a single power supply voltage
|
Tao, Xiaobing |
|
2011 |
71 |
3 |
p. 525-530 |
artikel |
5 |
A low power tunable Gm–C filter based on double CMOS inverters in 0.35 μm
|
Pirmohammadi, Abbas |
|
2011 |
71 |
3 |
p. 473-479 |
artikel |
6 |
A 250 MHz low voltage low-pass Gm-C filter
|
Lo, Tien-Yu |
|
2011 |
71 |
3 |
p. 465-472 |
artikel |
7 |
A 1 mW power-efficient high frequency CML 2:1 divider
|
Zhou, Chunyuan |
|
2011 |
71 |
3 |
p. 515-523 |
artikel |
8 |
Analogue CMOS prototype vision chip with prewitt edge processing
|
Garcia-Lamont, Jair |
|
2011 |
71 |
3 |
p. 507-514 |
artikel |
9 |
A new interpolation technique for time interleaved $$\Upsigma\Updelta$$ A/D converters
|
Beydoun, Ali |
|
2011 |
71 |
3 |
p. 391-406 |
artikel |
10 |
A semi-synchronous SAR ADC
|
Tong, Tao |
|
2011 |
71 |
3 |
p. 407-410 |
artikel |
11 |
A superheterodyne receiver front-end with on-chip automatically Q-tuned notch filters
|
Chi, Baoyong |
|
2011 |
71 |
3 |
p. 453-463 |
artikel |
12 |
A 1.2 V 10-bit 60-MS/s 23 mW CMOS pipeline ADC with 0.67 pJ/conversion-step and on-chip reference voltages generator
|
Ruiz-Amaya, Jesús |
|
2011 |
71 |
3 |
p. 371-381 |
artikel |
13 |
Circuit implementation of a fully programmable and continuously slope tunable triangular/trapezoidal membership function generator
|
Khalilzadegan, Amin |
|
2011 |
71 |
3 |
p. 561-570 |
artikel |
14 |
Design and implementation of PFM mode high efficiency boost regulator
|
Ahmed, Khondker Zakir |
|
2011 |
71 |
3 |
p. 349-358 |
artikel |
15 |
Design and realization of 1.3 Gb/s off-chip transmission circuitry using 0.35 μm CMOS technology
|
Hsu, Heng-Shou |
|
2011 |
71 |
3 |
p. 433-443 |
artikel |
16 |
Design of sub-1-V CMOS bandgap reference circuit using only one BJT
|
Lahiri, Abhirup |
|
2011 |
71 |
3 |
p. 359-369 |
artikel |
17 |
2.5-Gb/s low-jitter low-power monolithically integrated optical receiver
|
Chen, Yingmei |
|
2011 |
71 |
3 |
p. 445-451 |
artikel |
18 |
1 MHz–3.5 GHz, wide range input duty 50% output duty cycle corrector
|
Wu, Jianhui |
|
2011 |
71 |
3 |
p. 531-538 |
artikel |
19 |
70-MHz IF 10-MHz bandwidth bandpass $$\Upsigma\Updelta$$ modulator for WCDMA applications
|
Caracciolo, Hervé |
|
2011 |
71 |
3 |
p. 411-419 |
artikel |
20 |
Polyphase analysis filter bank down-converts unequal channel bandwidths with arbitrary center frequencies
|
Harris, Fred |
|
2011 |
71 |
3 |
p. 481-494 |
artikel |
21 |
Realization of wavelet transform using switched-current filters
|
Zhao, Wenshan |
|
2011 |
71 |
3 |
p. 571-581 |
artikel |
22 |
Sampled-data IIR filtering via time-mode signal processing
|
Guttman, Michael M. |
|
2011 |
71 |
3 |
p. 495-506 |
artikel |
23 |
Time-interleaved CMOS chip design of Manchester and Miller encoder for RFID application
|
Hung, Yu-Cherng |
|
2012 |
71 |
3 |
p. 549-560 |
artikel |
24 |
Versatile analog squarer and multiplier free from body effect
|
Chaisayun, Ittipong |
|
2011 |
71 |
3 |
p. 539-547 |
artikel |