| nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
| 1 |
Analysis, design, and implementation of a high-efficiency full-wave rectifier in standard CMOS technology
|
Bawa, Gaurav
|
|
2008
|
60 |
1-2 |
p. 71-81
|
artikel
|
| 2 |
Analytical model-based technique for efficient evaluation of noise robustness considering parameter variations
|
Massoud, Yehia
|
|
2008
|
60 |
1-2 |
p. 27-34
|
artikel
|
| 3 |
A new parallel link interface with current-mode incremental signaling and per-pin skew compensation
|
Hu, An
|
|
2008
|
60 |
1-2 |
p. 117-125
|
artikel
|
| 4 |
Delay extraction-based passive macromodeling techniques for transmission line type interconnects characterized by tabulated multiport data
|
Charest, Andrew
|
|
2008
|
60 |
1-2 |
p. 13-25
|
artikel
|
| 5 |
DISCO: a graphical methodology for the design of Sigma-Delta modulators
|
Buhmann, Alexander
|
|
2008
|
60 |
1-2 |
p. 3-11
|
artikel
|
| 6 |
Low-power interface circuits between adiabatic and standard CMOS circuits
|
Hu, Jianping
|
|
2008
|
60 |
1-2 |
p. 105-115
|
artikel
|
| 7 |
On the design and optimization of symmetric low swing to high swing level converter for on-chip interconnects
|
García, José C.
|
|
2008
|
60 |
1-2 |
p. 35-42
|
artikel
|
| 8 |
Performance analysis of burst-mode receivers with clock phase alignment and forward error correction for GPON
|
Shastri, Bhavin J.
|
|
2008
|
60 |
1-2 |
p. 57-70
|
artikel
|
| 9 |
Performance-driven circuit and layout co-optimization for deep-submicron analog circuits
|
Chan, Henry
|
|
2009
|
60 |
1-2 |
p. 43-55
|
artikel
|
| 10 |
Scaling prospect of optically differential reconfigurable gate array VLSIs
|
Watanabe, Minoru
|
|
2008
|
60 |
1-2 |
p. 137-143
|
artikel
|
| 11 |
Single-inductor dual-output (SIDO) DC–DC converters for minimized cross regulation and high efficiency in soc supplying systems
|
Huang, Ming-Hsin
|
|
2008
|
60 |
1-2 |
p. 93-103
|
artikel
|
| 12 |
Special issue on IEEE-NEWCAS/MWSCAS2007
|
Sawan, Mohamad
|
|
2009
|
60 |
1-2 |
p. 1-2
|
artikel
|
| 13 |
Statistical timing and leakage power analysis of PD-SOI digital circuits
|
Kim, Kyung Ki
|
|
2008
|
60 |
1-2 |
p. 127-136
|
artikel
|
| 14 |
Systematic approach to the synthesis of continuous-time cascaded sigma–delta modulators
|
Keller, Matthias
|
|
2008
|
60 |
1-2 |
p. 155-164
|
artikel
|
| 15 |
Top-down design methodology of a multi-bit continuous-time delta–sigma modulator
|
Mariano, A.
|
|
2008
|
60 |
1-2 |
p. 145-153
|
artikel
|
| 16 |
Versatile multi-decade CMOS voltage-controlled oscillator with accurate amplitude and pulse width control
|
Garimella, Annajirao
|
|
2008
|
60 |
1-2 |
p. 83-92
|
artikel
|
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