| nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
| 1 |
An Accurate Transient Analysis of High-Speed Package Interconnects Using Convolution Technique
|
Beyene, Wendemagegnehu T.
|
|
2003
|
35 |
2-3 |
p. 107-120
|
artikel
|
| 2 |
An Interconnect Scaling Scheme with Constant On-Chip Inductive Effects
|
Banerjee, Kaustav
|
|
2003
|
35 |
2-3 |
p. 97-105
|
artikel
|
| 3 |
Automated System-Level Test Development for Mixed-Signal Circuits
|
Ozev, Sule
|
|
2003
|
35 |
2-3 |
p. 169-178
|
artikel
|
| 4 |
Closed-Form Crosstalk Noise Delay Metrics
|
Chen, Lauren Hui
|
|
2003
|
35 |
2-3 |
p. 143-156
|
artikel
|
| 5 |
Comparator Generation and Selection for Highly Linear CMOS Flash Analog-to-Digital Converter
|
Yoo, Jincheol
|
|
2003
|
35 |
2-3 |
p. 179-187
|
artikel
|
| 6 |
Cross-Coupled Noise Propagation in VLSI Designs
|
Zolotov, Vladimir
|
|
2003
|
35 |
2-3 |
p. 133-142
|
artikel
|
| 7 |
Design of Digital Window Comparators and their Implementation within Mixed-Signal DfT Schemes
|
De Venuto, Daniela
|
|
2003
|
35 |
2-3 |
p. 157-168
|
artikel
|
| 8 |
Fault Sensitivity and Tolerance of Successive Approximation and Δ-Σ Analog-to-Digital Converters (ADCs)
|
Singh, Mandeep
|
|
2003
|
35 |
2-3 |
p. 189-197
|
artikel
|
| 9 |
Frequency Characteristics of High Speed Power Distribution Grids
|
Mezhiba, Andrey V.
|
|
2003
|
35 |
2-3 |
p. 207-214
|
artikel
|
| 10 |
Integrated Inductors Modeling for Library Development and Layout Generation
|
Sendra, José R.
|
|
2003
|
35 |
2-3 |
p. 121-132
|
artikel
|
| 11 |
Interconnect Geometry Optimization Using Modular Artificial Neural Networks
|
Ilumoka, A.
|
|
2003
|
35 |
2-3 |
p. 215-225
|
artikel
|
| 12 |
ISQED'2002 Editorial: Welcome to the Special Issue on Quality Electronic Design!
|
Tarim, Tuna B.
|
|
2003
|
35 |
2-3 |
p. 95
|
artikel
|
| 13 |
Layout-Specific Circuit Evaluation in 3-D Integrated Circuits
|
Alam, Syed M.
|
|
2003
|
35 |
2-3 |
p. 199-206
|
artikel
|
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