| nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
| 1 |
Analog Design Issues in Digital VLSI Circuits and Systems
|
Becerra, Juan J.
|
|
1997
|
14 |
1-2 |
p. 5-8
|
artikel
|
| 2 |
Analysis of Metastable Operation in a CMOS Dynamic D-Latch
|
Juan-Chico, J.
|
|
1997
|
14 |
1-2 |
p. 143-157
|
artikel
|
| 3 |
A Wired-AND Current-Mode Logic Circuit Technique in CMOS for Low-Voltage, High-Speed and Mixed-Signal VLSIC
|
Ungan, Ismail Enis
|
|
1997
|
14 |
1-2 |
p. 59-70
|
artikel
|
| 4 |
CMOS PLL Design in a Digital Chip Environment
|
Ramey, Delvan A.
|
|
1997
|
14 |
1-2 |
p. 91-112
|
artikel
|
| 5 |
Delay and Power Expressions for a CMOS Inverter Driving a Resistive-Capacitive Load
|
Adler, Victor
|
|
1997
|
14 |
1-2 |
p. 29-39
|
artikel
|
| 6 |
Design and Evaluation of Adiabatic Arithmetic Units
|
Knapp, Micah C.
|
|
1997
|
14 |
1-2 |
p. 71-79
|
artikel
|
| 7 |
di/dt Noise in CMOS Integrated Circuits
|
Larsson, Patrik
|
|
1997
|
14 |
1-2 |
p. 113-129
|
artikel
|
| 8 |
Filter Design Using a New Field-Programmable Analog Array (FPAA)
|
Kutuk, Haydar
|
|
1997
|
14 |
1-2 |
p. 81-90
|
artikel
|
| 9 |
Latin Hypercube Sampling Monte Carlo Estimation of Average Quality Index for Integrated Circuits
|
Keramat, Mansour
|
|
1997
|
14 |
1-2 |
p. 131-142
|
artikel
|
| 10 |
Mixed Analog Digital Simulation of Integrated Circuits with BRASIL
|
Bretthauer, U.
|
|
1997
|
14 |
1-2 |
p. 41-51
|
artikel
|
| 11 |
Ramp Input Response of RC Tree Networks
|
Friedman, Eby G.
|
|
1997
|
14 |
1-2 |
p. 53-58
|
artikel
|
| 12 |
Selection of Voltage Thresholds for Delay Measurement
|
Chandramouli, V.
|
|
1997
|
14 |
1-2 |
p. 9-28
|
artikel
|
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