| nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
| 1 |
A design approach for class-AB operational amplifier using the gm/ID methodology
|
Chen, Chen
|
|
|
119 |
1 |
p. 43-55
|
artikel
|
| 2 |
A 4-D four-wing chaotic system with widely chaotic regions and multiple transient transitions
|
Li, Lingyun
|
|
|
119 |
1 |
p. 195-213
|
artikel
|
| 3 |
A hybrid ensemble voting-based residual attention network for motor imagery EEG Classification
|
Jindal, K.
|
|
|
119 |
1 |
p. 165-184
|
artikel
|
| 4 |
A low power arithmetic unit driven motion estimation and intra prediction accelerators with adaptive Golomb–Rice entropy encoder for H.264 encoders on FPGA
|
Vigneash, L.
|
|
|
119 |
1 |
p. 69-83
|
artikel
|
| 5 |
Design and implementation of high-performance 20-T hybrid full adder circuit
|
Kandpal, Jyoti
|
|
|
119 |
1 |
p. 97-110
|
artikel
|
| 6 |
Design and simulation of a new current mirror circuit with low power consumption and high performance and output impedance
|
Li, Yuping
|
|
|
119 |
1 |
p. 29-41
|
artikel
|
| 7 |
Design an energy efficient pulse triggered ternary flip flops with Pseudo NCFET logic
|
Yamani, Sudha Vani
|
|
|
119 |
1 |
p. 151-163
|
artikel
|
| 8 |
Design a novel 1-bit full adder with hybrid logic for full-swing, area-efficiency and high-speed
|
Arul, A.
|
|
|
119 |
1 |
p. 111-130
|
artikel
|
| 9 |
Low voltage high bandwidth FVF current mirror using quasi floating self-cascode output stage
|
Domala, Narsaiah
|
|
|
119 |
1 |
p. 15-27
|
artikel
|
| 10 |
Parametric analysis on DC and analog/linearity response of multi-channel FinFET (Mch-FinFET) with spacer engineering
|
Das, Rinku Rani
|
|
|
119 |
1 |
p. 1-13
|
artikel
|
| 11 |
Power reduction using Unified techniques in Switch-tail Ring counter for sequential circuits
|
Angel Prabha, L.
|
|
|
119 |
1 |
p. 131-149
|
artikel
|
| 12 |
Realization of a pseudo-random number generator utilizing two coupled Izhikevich neurons on an FPGA platform
|
Feali, Mohammad Saeed
|
|
|
119 |
1 |
p. 57-68
|
artikel
|
| 13 |
Reliable and ultra-low power approach for designing of logic circuits
|
Haq, Shams Ul
|
|
|
119 |
1 |
p. 85-95
|
artikel
|
| 14 |
Signal dynamic range expansion and power supply voltage reduction for an exponentiation conversion IC
|
Nishiyama, Naoya
|
|
|
119 |
1 |
p. 185-194
|
artikel
|
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