no |
title |
author |
magazine |
year |
volume |
issue |
page(s) |
type |
1 |
A built-in self-test for analog reconfigurable filters implemented in a mixed-signal configurable processor
|
Dri, Emanuel |
|
|
112 |
2 |
p. 355-365 |
article |
2 |
A CMOS RF energy harvester with high PCE over a wide range of input power
|
Farhang Razi, Keyvan |
|
|
112 |
2 |
p. 317-323 |
article |
3 |
A comparative study on low phase noise feedback oscillators based on planar elliptic resonators
|
Nimehvari Varcheh, Hamed |
|
|
112 |
2 |
p. 325-332 |
article |
4 |
A current limiter for satellite power protection
|
Chacón, Ronald Hassib Galvis |
|
|
112 |
2 |
p. 289-300 |
article |
5 |
A first-order universal filter including a grounded capacitor and two CFOAs
|
Dogan, Mehmet |
|
|
112 |
2 |
p. 379-390 |
article |
6 |
An ultra low power analog integrated radial basis function classifier for smart IoT systems
|
Alimisis, Vassilis |
|
|
112 |
2 |
p. 225-236 |
article |
7 |
An ultra-low-power CMOS smart temperature sensor based on frequency to digital conversion
|
Lott, Daniel C. |
|
|
112 |
2 |
p. 209-223 |
article |
8 |
Auricular vagus nerve stimulator for closed-loop biofeedback-based operation
|
Dabiri, Babak |
|
|
112 |
2 |
p. 237-246 |
article |
9 |
Automatic tool for test set generation and DfT assessment in analog circuits
|
Zilch, Lucas B. |
|
|
112 |
2 |
p. 277-287 |
article |
10 |
Design and analysis of a SET tolerant single-phase clocked double-tail dynamic comparator
|
Wu, Hao |
|
|
112 |
2 |
p. 367-377 |
article |
11 |
Design of a low power and robust VLSI power line interference canceler with optimized arithmetic operators
|
da Rosa, Morgana Macedo Azevedo |
|
|
112 |
2 |
p. 247-261 |
article |
12 |
77/154 GHz push–push VCO with phase-noise- and output-power-enhanced off-state parallel transistors in 90 nm CMOS
|
Lin, Yo-Sheng |
|
|
112 |
2 |
p. 301-315 |
article |
13 |
SBCCI’2021 Guest Editorial
|
Moraes, Fernando Gehm |
|
|
112 |
2 |
p. 207-208 |
article |
14 |
Sharing SIMD execution units with decoupled offloader in asymmetric multicores
|
Vieira, Caio |
|
|
112 |
2 |
p. 263-275 |
article |
15 |
TSPC-HNTL: True Single Phase Clock technique for High speed, Noise Tolerance, and Low power
|
Verma, Preeti |
|
|
112 |
2 |
p. 333-345 |
article |
16 |
VDDDA based low power filter using 32 nm CNTFET technology
|
Özçelep, Yasin |
|
|
112 |
2 |
p. 391-399 |
article |
17 |
VDTA based Schmitt trigger using 32 nm CNTFET technology
|
Mamatov, Islombek |
|
|
112 |
2 |
p. 347-353 |
article |