| no |
title |
author |
magazine |
year |
volume |
issue |
page(s) |
type |
| 1 |
A 12-bit 10-MS/s SAR ADC with a weighted sampling time technique applied to C-DAC
|
Shim, Min-Soo
|
|
|
109 |
3 |
p. 639-646
|
article
|
| 2 |
A new design of fault-tolerant digital comparator based on quantum-dot cellular automata
|
Ji, Yun
|
|
|
109 |
3 |
p. 563-570
|
article
|
| 3 |
A 223-μW single-to-differential RF mixer with 8.6dBm IIP3 using current-bleeding and body-effect for sub-6 GHz 5G applications
|
Gladson, S. Chrisben
|
|
|
109 |
3 |
p. 571-583
|
article
|
| 4 |
Coupled-line-based millimeter-wave CMOS spiral power dividers with tapered TLs
|
Lin, Yo-Sheng
|
|
|
109 |
3 |
p. 625-637
|
article
|
| 5 |
Design analysis of GOS-HEFET on lower Subthreshold Swing SOI
|
Satyanarayana, B. V. V.
|
|
|
109 |
3 |
p. 683-694
|
article
|
| 6 |
Design and verification of a high performance analog switch circuit
|
Zhang, Lin
|
|
|
109 |
3 |
p. 673-681
|
article
|
| 7 |
Design of bandpass–bandpass diplexers using rectangular-, T-, and L-shaped resonators for hybrid power amplifier and 5G applications
|
Tahmasbi, Meisam
|
|
|
109 |
3 |
p. 585-597
|
article
|
| 8 |
High-performance radiation hardened NMOS only Schmitt Trigger based latch designs
|
Shah, Ambika Prasad
|
|
|
109 |
3 |
p. 657-671
|
article
|
| 9 |
Load-dependent power transfer efficiency for on-chip coils
|
Nilsson, Joakim
|
|
|
109 |
3 |
p. 611-624
|
article
|
| 10 |
Moving average filter for spur reduction in subsampling fractional PLLs
|
Biswas, Debdut
|
|
|
109 |
3 |
p. 695-704
|
article
|
| 11 |
Optimal characterization of a microwave transistor using grey wolf algorithms
|
Kiani, Farzad
|
|
|
109 |
3 |
p. 599-609
|
article
|
| 12 |
OptiPlace: optimized placement solution for mixed-size designs
|
Datta, Prasun
|
|
|
109 |
3 |
p. 501-515
|
article
|
| 13 |
Performance-binning and yield-improvement by clock-edge adjusted circuit for multi-Vdd multi-Vth designed chips
|
Cheng, Ching-Hwa
|
|
|
109 |
3 |
p. 535-544
|
article
|
| 14 |
Phase locked loop-based clock synthesizer for reconfigurable analog-to-digital converters
|
Castro, Mateus B.
|
|
|
109 |
3 |
p. 647-656
|
article
|
| 15 |
Process evaluation in FinFET based 7T SRAM cell
|
Kumar, T. Santosh
|
|
|
109 |
3 |
p. 545-551
|
article
|
| 16 |
Sleepy keeper style based Low Power VLSI Architecture of a Viterbi Decoder applying for the Wireless LAN Operation sustainability
|
Kalavathi Devi, T.
|
|
|
109 |
3 |
p. 487-499
|
article
|
| 17 |
Soft-core embedded FPGA based system on chip
|
Saidi, Hajer
|
|
|
109 |
3 |
p. 517-533
|
article
|
| 18 |
Using nano-scale QCA technology for designing fault-tolerant 2:1 multiplexer
|
Wu, Linli
|
|
|
109 |
3 |
p. 553-562
|
article
|
Journal description