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                             53 gevonden resultaten
nr titel auteur tijdschrift jaar jaarg. afl. pagina('s) type
1 A CONSTRUCTIVE AND MODULAR APPROACH TO DECENTRALIZED SUPERVISORY CONTROL PROBLEMS Komenda, Jan
 2006
 39 17 p. 111-116
6 p.
 artikel
2 ADVANCED SYNTHESIS OF DSP ALGORITHMS IN MODERN PROGRAMMABLE ARCHITECTURES łuba, Tadeusz
 2006
 39 17 p. 19-24
6 p.
 artikel
3 AMCAS: ADVANCED METHODS FOR THE CO-DESIGN OF COMPLEX ADAPTIVE SYSTEMS Rosado-Muñoz, A.
 2006
 39 17 p. 31-35
5 p.
 artikel
4 A METHODOLOGY TO DESIGN AND CHECK A PLANT MODEL Rohee, B.
 2006
 39 17 p. 245-250
6 p.
 artikel
5 ANALYSIS OF SAFENESS, LIVENESS AND PERSISTENCE PROPERTIES OF PETRI NETS BY MEANS OF MONOTONE LOGIC FUNCTIONS Miczulski, Piotr
 2006
 39 17 p. 137-142
6 p.
 artikel
6 A NEW HEURISTIC ALGORITHM FOR SEQUENTIAL TWO-BLOCK DECOMPOSITION OF BOOLEAN FUNCTIONS Zakrevskij, Arkadij
 2006
 39 17 p. 13-17
5 p.
 artikel
7 APPLICATION OF DATABASES FOR MANAGEMENT OF DISTRIBUTED CONTROL SYSTEMS Wegrzyn, Agnieszka
 2006
 39 17 p. 263-268
6 p.
 artikel
8 ARBITRATION CIRCUIT WITH CYCLICALLY SHIFTED PRIORITIES FOR MULTIPROCESSOR SYSTEM Taborek, Krzysztof
 2006
 39 17 p. 173-178
6 p.
 artikel
9 AUTOMATIC PLC CODE GENERATION USING MATLAB Hasdemir, İ. Tolga
 2006
 39 17 p. 131-136
6 p.
 artikel
10 COMPACT PLC WITH EVENT-DRIVEN PROGRAM TASKS EXECUTION CHMIEL, Mirosław
 2006
 39 17 p. 99-104
6 p.
 artikel
11 CONFIGURABLE 8-BIT MICROCONTROLLER IP CORE AS A BASIS FOR EFFECTIVE SYSTEM ON CHIP IMPLEMENTATION Pyka, Maciej
 2006
 39 17 p. 167-171
5 p.
 artikel
12 DESIGN OF COMPOSITIONAL MICROPROGRAM CONTROL UNITS WITH ELEMENTARY OPERATIONAL LINEAR CHAINS Wiśniewski, Remigiusz
 2006
 39 17 p. 191-194
4 p.
 artikel
13 DESIGN OF EXPERIMENTAL PLATFORM FOR TESTING REAL-TIME DATABASE TRANSACTION PROCESSING Król, Václav
 2006
 39 17 p. 289-293
5 p.
 artikel
14 DESIGN OF THE SPIKING NEURON HAVING LEARNING CAPABILITIES BASED ON FPGA CIRCUITS Kraft, Marek
 2006
 39 17 p. 301-306
6 p.
 artikel
15 ERROR CORRECTION PROCEDURES FOR A HARDWARE IMPLEMENTATION OF THE ADVANCED ENCRYPTION STANDARD BIERNAT, Janusz
 2006
 39 17 p. 307-312
6 p.
 artikel
16 FAULT TOLERANCE EXTENSIONS OF TrueTime PACKAGE FOR DISCRETE SYSTEMS SIMULATION Trawczynski, Dawid M.
 2006
 39 17 p. 79-84
6 p.
 artikel
17 FROM SELF-TEST TO SELF-REPAIR Zwoliński, Mark
 2006
 39 17 p. 59-64
6 p.
 artikel
18 FROM STATECHARTS TO FSM-DESCRIPTION - TRANSFORMATION BY MEANS OF SYMBOLIC METHODS łabiak, Grzegorz
 2006
 39 17 p. 161-166
6 p.
 artikel
19 Front cover 2006
 39 17 p. i-ix
nvt p.
 artikel
20 GENERALIZED COMPACT TABLE IN DECOMPOSITION OF A BOOLEAN FUNCTION Pottosin, Yuri
 2006
 39 17 p. 49-52
4 p.
 artikel
21 GENTZEN SYSTEM CALCULUS IMPLEMENTATION FOR SYMBOLIC MINIMALIZATION OF COMPLICATED LOGICAL EXPRESSIONS Tkacz, Jacek
 2006
 39 17 p. 53-56
4 p.
 artikel
22 HEDEFS – HARDWARE EMBEDDED DEDUCTIVE FAULT SIMULATION Hahanov, Vladimir
 2006
 39 17 p. 25-30
6 p.
 artikel
23 HIERARCHICAL SELF TEST FOR SOCS INCLUDING LOGIC AND INTERCONNECTS Kothe, R.
 2006
 39 17 p. 85-89
5 p.
 artikel
24 IMPLEMENTATION OF ANALITIC FUNCTIONS OF REAL ARGUMENT IN VLSI Kochanov, Denis
 2006
 39 17 p. 319-321
3 p.
 artikel
25 IMPLEMENTATION OF HETEROGONOUS EMBEDDED MICROSYSTEMS Skowroński, Zbigniew
 2006
 39 17 p. 313-318
6 p.
 artikel
26 INTERNAL EVENT REMOVAL IN HIERARCHICAL AND CONCURRENT STATE DIAGRAMS Costa, Anikó
 2006
 39 17 p. 105-110
6 p.
 artikel
27 IS THERE A PLC ALTERNATIVE FOR INDUSTRY? Clark, Ian
 2006
 39 17 p. 125-130
6 p.
 artikel
28 LOGIC CONTROLLERS DEPENDABILITY VERIFICATION USING A PLANT MODEL Machado, José M.
 2006
 39 17 p. 37-42
6 p.
 artikel
29 MiADL: AN ARCHITECTURE DESCRIPTION LANGUAGE FOR DESIGN SPACE EXPLORATION Metrôlho, J.
 2006
 39 17 p. 239-244
6 p.
 artikel
30 MODELING TECHNIQUE FOR MODEL BASED ERROR LOCALIZATION AND ERROR REMOVAL BASED ON EXTENDED UML ACTIVITY DIAGRAMS Fengler, Wolfgang
 2006
 39 17 p. 65-72
8 p.
 artikel
31 MODELLING HARDWARE AND SOFTWARE FOR FAST SERIAL INTERPROCESSOR COMMUNICATION Däne, Bernd
 2006
 39 17 p. 155-160
6 p.
 artikel
32 OFF-LINE IDENTIFICATION FOR A CLASS OF DISCRETE EVENT SYSTEMS USING SAFE PETRI NETS Bekrar, Rebiha
 2006
 39 17 p. 221-226
6 p.
 artikel
33 OPTIMIZATION OF CIRCUIT OF MEALY FINITE STATE MACHINE ON FPGA BASED ON ENCODING OF THE FIELDS OF COMPATIBLE MICROOPERATIONS AND VERTICALIZATION OF FLOW-CHART Barkalov, Alexander
 2006
 39 17 p. 297-300
4 p.
 artikel
34 OPTIMIZATION OF CONTROL UNIT WITH CODE SHARING Barkalov, Alexander
 2006
 39 17 p. 195-200
6 p.
 artikel
35 OPTIMIZATION OF LUT-ELEMENTS AMOUNT IN CONTROL UNIT OF SYSTEM-ON-CHIP Barkalov, Alexander
 2006
 39 17 p. 143-146
4 p.
 artikel
36 PDPT FRAMEWORK - BUILDING INFORMATION SYSTEM WITH SPEEDUP CONNECTIVITY OF MOBILE DEVICE Krejcar, Ondřej
 2006
 39 17 p. 251-256
6 p.
 artikel
37 PETRI NET DECOMPOSITION APPROACH FOR PARTIAL RECONFIGURATION OF LOGIC CONTROLLERS Wegrzyn, Marek
 2006
 39 17 p. 323-328
6 p.
 artikel
38 PROBABILISTIC HYBRID AUTOMATA WITH VARIABLE STEP WIDTH APPLIED TO THE ANAYLSIS OF NETWORKED AUTOMATION SYSTEMS Greifeneder, Jürgen
 2006
 39 17 p. 283-288
6 p.
 artikel
39 PROTOTYPING OF CONCURRENT CYCLIC PROCESSES Majdzik, Paweł
 2006
 39 17 p. 257-262
6 p.
 artikel
40 REAL-TIME CLIMATE CONTROL IN A COMPLEX GREENHOUSE Candido, Alessandro
 2006
 39 17 p. 271-276
6 p.
 artikel
41 RECONFIGURABLE LOGIC CONTROLLER FOR EMBEDDED APPLICATIONS Adamski, Marian
 2006
 39 17 p. 147-152
6 p.
 artikel
42 RTCP-NET APPROACH TO VERIFICATION OF EMBEDDED SYSTEMS IMPLEMENTED IN ADA Szpyrka, Marcin
 2006
 39 17 p. 203-208
6 p.
 artikel
43 SEMANTIC INTEGRITY OF FLAT AND HIERARCHICAL PETRI NETS Andrzejewski, Grzegorz
 2006
 39 17 p. 233-236
4 p.
 artikel
44 SOME ASPECTS OF LOGICAL CONTROL SYSTEMS DESIGN USING PRALU Cheremisinov, Dmitry I.
 2006
 39 17 p. 43-48
6 p.
 artikel
45 STATE RESTORATION AT RUNTIME AFTER TRANSIENT HARDWARE-FAULTS IN REDUNDANT REAL-TIME SYSTEMS Skambraks, Martin
 2006
 39 17 p. 93-98
6 p.
 artikel
46 STATISTICAL DETECTION OF THE FAULTY BEHAVIOUR OF ISLIP-BASED SCHEDULERS FOR VOQ SWITCHES Pereira, Miguel
 2006
 39 17 p. 73-77
5 p.
 artikel
47 STUBBORN SET METHOD FOR INTERPRETED PETRI NETS Karatkevich, Andrei
 2006
 39 17 p. 227-232
6 p.
 artikel
48 SUPERVISORY CONTROL OF GRID CONNECTED WIND POWER SYSTEMS TO GUARANTEE SAFE OPERATION Iuliana BRATCU, Antoneta
 2006
 39 17 p. 117-122
6 p.
 artikel
49 SYNTHESIS OF PARALLEL CONTROLLERS THROUGH A LOGIC MATRIX MODEL Quintáns, Camilo
 2006
 39 17 p. 179-184
6 p.
 artikel
50 THE INFLUENCE OF THE LOGIC MINIMIZATION ON THE COMPLEXITY OF CIRCUITS REALIZED AS A PART OF GATE ARRAYS AND CUSTOM VLSI Bibilo, Pyotr
 2006
 39 17 p. 185-190
6 p.
 artikel
51 TIME ANALYSIS OF PROTOCOL CONVERTERS FOR WIRELESS TRANSMISSION IN MODBUS NETWORKS Zieliński, Bartłomiej
 2006
 39 17 p. 277-282
6 p.
 artikel
52 UML IN DESIGN OF ASIP Masařík, Karel
 2006
 39 17 p. 209-214
6 p.
 artikel
53 UML MANUFACTURING SYSTEM MODEL ANALYSIS USING PETRI NETS Tomasz, Kowalski
 2006
 39 17 p. 215-220
6 p.
 artikel
                             53 gevonden resultaten
 
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