Digitale Bibliotheek
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                             130 gevonden resultaten
nr titel auteur tijdschrift jaar jaarg. afl. pagina('s) type
1 A behavioral level tool for design and verification of parallel architectures: PADS Distante, F.
1993
38 1-5 p. 723-730
8 p.
artikel
2 Active object oriented databases in control applications Loborg, Peter
1993
38 1-5 p. 255-263
9 p.
artikel
3 A design methodology for the correct specification of VLSI systems Bolchini, C.
1993
38 1-5 p. 563-570
8 p.
artikel
4 A distributed bandwidth allocation algorithm for Gbit/s LANs Antonakopoulos, T.
1993
38 1-5 p. 301-308
8 p.
artikel
5 A distributed deadlock detection algorithm for the AND model González de Mendívil, JoséR.
1993
38 1-5 p. 385-392
8 p.
artikel
6 Advances in object-oriented design Klöckner, Konrad
1993
38 1-5 p. 253-
1 p.
artikel
7 A fault-tolerant server on MACH Arévalo, S.
1993
38 1-5 p. 793-800
8 p.
artikel
8 Algorithms and tools for VLSI design Jóźwiak, Lec
1993
38 1-5 p. 705-706
2 p.
artikel
9 Analysis and simulation of six bus arbitration protocols Lakshmi Narasimhan, V.
1993
38 1-5 p. 655-662
8 p.
artikel
10 Analysis tools applied to VHDL Olcoz, Serafin
1993
38 1-5 p. 597-604
8 p.
artikel
11 An asynchronous approach to the RISC design of a micro-controller Costa, Alessandra
1993
38 1-5 p. 447-454
8 p.
artikel
12 An empirical study of automatic restructuring of vision programs for simd machines Barragán, L.A.
1993
38 1-5 p. 553-560
8 p.
artikel
13 An empirical study of genetic operators in genetic algorithms Yao, Xin
1993
38 1-5 p. 707-714
8 p.
artikel
14 An ISDN primary rate interface for ethernet access Videira, F.
1993
38 1-5 p. 309-315
7 p.
artikel
15 An object-oriented model of design evolution Charlton, Colin
1993
38 1-5 p. 411-418
8 p.
artikel
16 A parallel architecture for the Color Doppler flow technique in ultrasound imaging Costa, Alessandra
1993
38 1-5 p. 545-551
7 p.
artikel
17 Application-driven architectures Winter, Stephen
1993
38 1-5 p. 527-
1 p.
artikel
18 Application of the novel associative programmable array-structure multi-match-PLA in synthesis of decomposed finite state machines Kottsieper, J.
1993
38 1-5 p. 455-465
11 p.
artikel
19 A processor array module for distributed, massively parallel, embedded computing Bengtsson, Lars
1993
38 1-5 p. 529-537
9 p.
artikel
20 Arco: A cost-effective and flexible hardware maze router Aude, J.S.
1993
38 1-5 p. 149-159
11 p.
artikel
21 A reusable load balancer for parallel search problems Joosen, Wouter
1993
38 1-5 p. 205-212
8 p.
artikel
22 A software system for the generation of test data for Ada programs Gallagher, M.J.
1993
38 1-5 p. 637-644
8 p.
artikel
23 A study of the resetability of synchronous sequential circuits Lioy, A.
1993
38 1-5 p. 395-402
8 p.
artikel
24 Author index 1993
38 1-5 p. 855-857
3 p.
artikel
25 Automata decomposition and synthesis with PLAM Baranov, S.
1993
38 1-5 p. 759-766
8 p.
artikel
26 Automated support for the formal specification and design of real-time systems Ho-Stuart, Chris
1993
38 1-5 p. 79-86
8 p.
artikel
27 Automatic test pattern generation can be solved as a constraint satisfaction problem Tilly, K.
1993
38 1-5 p. 715-722
8 p.
artikel
28 Branch optimization of the TOOBSIE2 RISC-processor and classification Schäfers, Michael
1993
38 1-5 p. 141-147
7 p.
artikel
29 Chairmen's introduction Valero, Mateo
1993
38 1-5 p. vii-
1 p.
artikel
30 Computing the generalized eigenvalues of symmetric positive definite pencils on networks of transputers Giménez, D.
1993
38 1-5 p. 335-342
8 p.
artikel
31 Concurrency control algorithms for real-time systems Nakazato, Hidenori
1993
38 1-5 p. 647-654
8 p.
artikel
32 Concurrent ring: Design and evaluation of a new Token Ring LAN Sandoval, J.D.
1993
38 1-5 p. 293-299
7 p.
artikel
33 Conflict-free access to streams in multiprocessor systems Peiron, Montse
1993
38 1-5 p. 119-130
12 p.
artikel
34 Connectionist model description: A case study Kock, Gerd
1993
38 1-5 p. 843-850
8 p.
artikel
35 Design of an extended transputer processor farm system Yung, C.W.
1993
38 1-5 p. 539-543
5 p.
artikel
36 Design of a VLIW architecture constructed from standard RISC chips: A case study of hardware/software codesign Pfahler, Peter
1993
38 1-5 p. 61-68
8 p.
artikel
37 Design of TMS320C40 signal processors and programmable logic based prototyping environment of real-time machine vision architectures Rautiola, Kyösti
1993
38 1-5 p. 663-668
6 p.
artikel
38 DIP : Distributed Diagnosis Protocol Silva, Luís Moura
1993
38 1-5 p. 171-178
8 p.
artikel
39 Distributed active objects: A methodological proposal and tool for distributed programming with transputer systems Capel, M.
1993
38 1-5 p. 197-204
8 p.
artikel
40 Distributed memory management Milligan, Peter
1993
38 1-5 p. 97-98
2 p.
artikel
41 Dynamic protocol configuration for multimedia networks Stainov, Rumen
1993
38 1-5 p. 741-748
8 p.
artikel
42 Editorial Board 1993
38 1-5 p. iv-
1 p.
artikel
43 Efficient synthesis of distributed vector multipliers Fehér, B.
1993
38 1-5 p. 345-350
6 p.
artikel
44 Evaluating the Cost of conditional branches on the performance of superscalar machines Fernandes, Edil S.T.
1993
38 1-5 p. 133-140
8 p.
artikel
45 Evaluating transport triggered architectures for scalar applications Corporaal, Henk
1993
38 1-5 p. 45-52
8 p.
artikel
46 Exact and efficient advanced loop interchange Yang, Chu-Sing
1993
38 1-5 p. 421-428
8 p.
artikel
47 Experimental evaluation of Mad Postman bidimensional routing networks Izu, C
1993
38 1-5 p. 33-41
9 p.
artikel
48 Fault behavior and testability of asynchronous CMOS circuits Vierhaus, H.T.
1993
38 1-5 p. 223-228
6 p.
artikel
49 Fault tolerant multiple-bus interconnection networks Sosnowski, J.
1993
38 1-5 p. 25-32
8 p.
artikel
50 FDT Tools Schummy, Harald
1993
38 1-5 p. 819-
1 p.
artikel
51 FSM fault models impact on test performances Bolchini, C.
1993
38 1-5 p. 229-236
8 p.
artikel
52 Fuzzy logic, neural networks and soft computing Zadeh, Lotfi Z.
1993
38 1-5 p. 13-
1 p.
artikel
53 Glass: a graph-theoretical approach for global binding Badia, Rosa M.
1993
38 1-5 p. 775-782
8 p.
artikel
54 Global query management in heterogeneous distributed database systems Kang, Sukhoon
1993
38 1-5 p. 377-384
8 p.
artikel
55 Hardware features of the static communication network of a parallel architecture Néri, V.
1993
38 1-5 p. 19-24
6 p.
artikel
56 Heterogeneous schema integration method for multidatabase system Lee, Yoonsook
1993
38 1-5 p. 265-272
8 p.
artikel
57 IDFG: An interactive applications specification model with phenomenological properties Kameas, A.
1993
38 1-5 p. 615-623
9 p.
artikel
58 Image component labeling on reconfigurable processor array Maresca, M
1993
38 1-5 p. 327-334
8 p.
artikel
59 Implementation of Given's Rotation processors for DSP real-time applications Metafas, D.E.
1993
38 1-5 p. 351-357
7 p.
artikel
60 Implementing and checking timing constraints in real-time programs Lin, Kwei-Jay
1993
38 1-5 p. 477-484
8 p.
artikel
61 Incremental resources estimation with real-time feedback from measurement Oivo, Markku
1993
38 1-5 p. 281-289
9 p.
artikel
62 Introducing structure into behavioural descriptions obtained from timing diagram specifications Tiedemann, W.D
1993
38 1-5 p. 581-588
8 p.
artikel
63 Issues in distributed systems Judmann, Kurt P.
1993
38 1-5 p. 645-
1 p.
artikel
64 Local area networks Rzehak, Helmut
1993
38 1-5 p. 291-
1 p.
artikel
65 Logic design Jávor, András
1993
38 1-5 p. 393-
1 p.
artikel
66 Mapping and parallel simulation of synchronous neural networks on multiprocessors Reski, Thilo
1993
38 1-5 p. 681-688
8 p.
artikel
67 Matching algorithms and architectures Fortes, Jose A.B.
1993
38 1-5 p. 15-
1 p.
artikel
68 Memory testing in a massively parallel machine Aktouf, Ch.
1993
38 1-5 p. 245-252
8 p.
artikel
69 Modeling and design of the multimedia subsystem of a distributed authoring environment Kameas, A.
1993
38 1-5 p. 669-678
10 p.
artikel
70 Move32int, a sea of gates realization of a high performance transport triggered architecture Corporaal, Henk
1993
38 1-5 p. 53-60
8 p.
artikel
71 Neural accelerator for parallelization of back-propagation algorithm Franzi, Edoardo
1993
38 1-5 p. 689-696
8 p.
artikel
72 Neural networks Kock, Gerd
1993
38 1-5 p. 679-
1 p.
artikel
73 N version programming with majority voting decision: Dependability modeling and evaluation Goševa - Popstojanova, K.
1993
38 1-5 p. 811-818
8 p.
artikel
74 OCEAN: A hardware and software tool for design of future smart cards Caron, Olivier
1993
38 1-5 p. 467-474
8 p.
artikel
75 On computing the 2-D discrete cosine transform using rotations Karathanasis, Haralambos C.
1993
38 1-5 p. 359-365
7 p.
artikel
76 On guaranteeing hard real-time tasks Moron, Celio Estevan
1993
38 1-5 p. 485-490
6 p.
artikel
77 Optimal data dependence chaining in parallel loops Szczerbiński, Z
1993
38 1-5 p. 437-444
8 p.
artikel
78 Parallelizing compiler techniques McConnell, Richard
1993
38 1-5 p. 419-420
2 p.
artikel
79 Parallel software engineering Kacsuk, P.
1993
38 1-5 p. 187-188
2 p.
artikel
80 Parallel WZ factorization on mesh multiprocessors Asenjo, R
1993
38 1-5 p. 319-326
8 p.
artikel
81 Pen-based recognizing of handprinted characters Klauer, B.
1993
38 1-5 p. 803-809
7 p.
artikel
82 Performance analysis of synchronous multibuffered packet-switching networks Tentov, A.
1993
38 1-5 p. 749-755
7 p.
artikel
83 Petri Nets applied to the modelling and analysis of computer architecture problems Silva, M
1993
38 1-5 p. 1-11
11 p.
artikel
84 PLANNER 4: A simulator to design packet switching data network Allegra, S.
1993
38 1-5 p. 179-186
8 p.
artikel
85 Priority-driven concurrency control based on data conflict state in distributed real-time databases Kim, Jinhwan
1993
38 1-5 p. 491-499
9 p.
artikel
86 Processor architecture I Waldschmidt, Klaus
1993
38 1-5 p. 43-44
2 p.
artikel
87 Proconsul, a tool for computer-aided protocol engineering Tarnay, K
1993
38 1-5 p. 821-825
5 p.
artikel
88 Programme chairman's introduction 1993
38 1-5 p. ix-x
nvt p.
artikel
89 Protection and routing algorithms for network management Papadopoulos, Constantinos V.
1993
38 1-5 p. 163-170
8 p.
artikel
90 Protocols and performance analysis Ciccarella, G.
1993
38 1-5 p. 731-
1 p.
artikel
91 Providing circuit service over a high speed deflection network Pagani, E
1993
38 1-5 p. 733-739
7 p.
artikel
92 Real-time behavior monitoring for multi-processor systems Calvez, J.P.
1993
38 1-5 p. 213-220
8 p.
artikel
93 Real-time specification using Petri nets Sacha, K.
1993
38 1-5 p. 607-614
8 p.
artikel
94 Redundancy analysis and removal for VLSI ASIC's Ivinskis, K.
1993
38 1-5 p. 237-243
7 p.
artikel
95 Relational algebra as formalism for hardware design ten Berg, A.J.W.M.
1993
38 1-5 p. 403-410
8 p.
artikel
96 Removal of catastrophic noise in hetero-associative training samples Tuv, E.
1993
38 1-5 p. 697-704
8 p.
artikel
97 Resource-constrained pipelining based on loop transformations Sánchez, F.
1993
38 1-5 p. 429-436
8 p.
artikel
98 Reviewers 1993
38 1-5 p. xi-xii
nvt p.
artikel
99 RT-level synthesis Tirado, Francisco
1993
38 1-5 p. 757-
1 p.
artikel
100 SEAL A simple language for prototyping action-event specifications Brink, K.
1993
38 1-5 p. 87-95
9 p.
artikel
101 Sequential and parallel strategies for the demand-driven simulation of logic circuits Dunne, P.E.
1993
38 1-5 p. 519-525
7 p.
artikel
102 Session A1: Interconnection networks 1993
38 1-5 p. 17-
1 p.
artikel
103 Session A3: System specification I Grass, Werner
1993
38 1-5 p. 69-
1 p.
artikel
104 Session B2: Processor Architecture II Cortadella, Jordi
1993
38 1-5 p. 131-
1 p.
artikel
105 Session chairpersons 1993
38 1-5 p. xiii-
1 p.
artikel
106 Session chairpersons' addresses 1993
38 1-5 p. 851-854
4 p.
artikel
107 Session D2: ASIC design Scarabotollo, N.
1993
38 1-5 p. 343-
1 p.
artikel
108 Session D3: Data base systems Tyrrell, A.M.
1993
38 1-5 p. 367-
1 p.
artikel
109 Session E3: Real-time systems 1993
38 1-5 p. 475-476
2 p.
artikel
110 Session E4: VLSI simulation 1993
38 1-5 p. 501-
1 p.
artikel
111 Session H2: Decision making under uncertainty 1993
38 1-5 p. 801-802
2 p.
artikel
112 Session H1: Fault tolerance Grosspietsch, Karl E.
1993
38 1-5 p. 783-
1 p.
artikel
113 SHC-SLX: A levelized compiled, event driven interpreted VLSI simulator Carro, L.
1993
38 1-5 p. 503-509
7 p.
artikel
114 Some practical considerations for the implementer of the SCI network Habchi, Vincent
1993
38 1-5 p. 109-118
10 p.
artikel
115 Subject index 1993
38 1-5 p. 859-861
3 p.
artikel
116 Synthesis for testability by synthesis controlling Nagel, Christof
1993
38 1-5 p. 767-774
8 p.
artikel
117 System specification - II 1993
38 1-5 p. 833-
1 p.
artikel
118 Test strategy for indeterministic protocols Tör″o, Mária
1993
38 1-5 p. 827-832
6 p.
artikel
119 The design of time-critical conversations Tyrell, A.M.
1993
38 1-5 p. 785-792
8 p.
artikel
120 The memory hierarchy of the CHESS computer Lioupis, D.
1993
38 1-5 p. 99-107
9 p.
artikel
121 Three approaches to interprocedural dynamic slicing Kamkar, Mariam
1993
38 1-5 p. 625-636
12 p.
artikel
122 Timing analysis for DCFL/SDCFL VLSI circuits Gómez, L.
1993
38 1-5 p. 511-518
8 p.
artikel
123 TL: A system specification system Benders, L.P.M.
1993
38 1-5 p. 835-842
8 p.
artikel
124 Tools for object-oriented SPMD programming Moisan, B.
1993
38 1-5 p. 189-196
8 p.
artikel
125 Toward automated support for object-oriented modelling Ayre, J.
1993
38 1-5 p. 273-280
8 p.
artikel
126 VHDL generation from a timed extension of the formal description technique LOTOS within the FORMAT project Delgado Kloos, C
1993
38 1-5 p. 589-596
8 p.
artikel
127 VHDL/S — integrating statecharts, timing diagrams, and VHDL Helbig, J.
1993
38 1-5 p. 571-580
10 p.
artikel
128 Visual query language for object-oriented databases: OQD Cheol Kwak, Jae
1993
38 1-5 p. 369-376
8 p.
artikel
129 VLSI testing and testability Erényi, István
1993
38 1-5 p. 221-
1 p.
artikel
130 X-Nets: A visual formalism for system specification and analysis Antoniazzi, S.
1993
38 1-5 p. 71-78
8 p.
artikel
                             130 gevonden resultaten
 
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