Digitale Bibliotheek
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                             143 gevonden resultaten
nr titel auteur tijdschrift jaar jaarg. afl. pagina('s) type
1 Accurate extraction of interconnect capacitances by adaptive mixed F.E.M. Ferragut, L.
1991
32 1-5 p. 61-68
8 p.
artikel
2 A CMOS implementation of the ESA/390 mainframe architecture Roethe, Nicholas
1991
32 1-5 p. 209-214
6 p.
artikel
3 A combined fuzzy and classical PID controller Kwok, D.P.
1991
32 1-5 p. 701-708
8 p.
artikel
4 A communication mechanism and its implementation in the Multi-SIMD massively parallel machine SPHINX Bouaziz, Samir
1991
32 1-5 p. 39-43
5 p.
artikel
5 A comparison of temporal Petri net techniques in the specification and design of hard real-time systems Sagoo, J.S.
1991
32 1-5 p. 111-118
8 p.
artikel
6 A design concept for verified concurrent controllers Schäfer, M.
1991
32 1-5 p. 299-306
8 p.
artikel
7 A fast method of protocol validation using reduced stable state exploration technique Hsieh, W.S.
1991
32 1-5 p. 723-730
8 p.
artikel
8 A hardware allocator guided by cost functions Septiéna, J.
1991
32 1-5 p. 185-192
8 p.
artikel
9 A higher level of behavioural specification: An example in interval temporal logic Dowsing, R.D.
1991
32 1-5 p. 517-524
8 p.
artikel
10 Algorithms for inference control Kameas, Achilles
1991
32 1-5 p. 755-764
10 p.
artikel
11 A modula-2-like systems programming language and its implementation Miranda, Javier
1991
32 1-5 p. 625-634
10 p.
artikel
12 A multiprocessor bus system with cyclic data exchange for the field of control and signal processing Schweinzer, Herbert
1991
32 1-5 p. 709-716
8 p.
artikel
13 Analysis of failure data collected from a TMR microprocessor controller Wingate, Guy A.S.
1991
32 1-5 p. 861-868
8 p.
artikel
14 An analysis of communication and multiprogramming in the Helios operating system Hemery, Fred
1991
32 1-5 p. 137-144
8 p.
artikel
15 An applicative real-time language for DSP-programming supporting asynchronous data-flow concepts Knoll, A.
1991
32 1-5 p. 541-547
7 p.
artikel
16 An architectural design support environment for high-performance digital systems Antoniazzi, Stefano
1991
32 1-5 p. 315-321
7 p.
artikel
17 An efficient for the sequential general decomposition of sequential machines Jóźwiak, L.
1991
32 1-5 p. 657-664
8 p.
artikel
18 An efficient routing strategy to support process migration Delaplace, Franck
1991
32 1-5 p. 153-160
8 p.
artikel
19 A new approach on fault list handling for faster fault elimination and direct test vector generation Aguado, M.J.
1991
32 1-5 p. 853-859
7 p.
artikel
20 An image distance measure insensitive to amplitude and mean value variations Jezieniecki, Roberto
1991
32 1-5 p. 453-460
8 p.
artikel
21 An integrated framework for the design of distributed programming environments Fernández, Miguel Angel Ruz
1991
32 1-5 p. 401-409
9 p.
artikel
22 An integrated software environment for large-scale Occam programming Barbosa, Valmir C.
1991
32 1-5 p. 393-400
8 p.
artikel
23 An intelligent sensor integrated preprocessing facility for neural networks Büddefeld, J.
1991
32 1-5 p. 335-341
7 p.
artikel
24 An object oriented approach to data persistence Ancona, Massimo
1991
32 1-5 p. 263-270
8 p.
artikel
25 A placing and routing tool implemented in Prolog Kyrloglou, N.A.
1991
32 1-5 p. 425-433
9 p.
artikel
26 A Prolog-based design environment for the high-level synthesis of application-specific architectures Tsanakas, P.
1991
32 1-5 p. 307-313
7 p.
artikel
27 A reconfigurable modular fault tolerant generalized Boolean n-cube network Yang, C.S.
1991
32 1-5 p. 589-592
4 p.
artikel
28 A regular interconnection network Yang, C.S.
1991
32 1-5 p. 583-587
5 p.
artikel
29 Array processor for LS FIR system identification Nikolaidis, S.S.
1991
32 1-5 p. 557-563
7 p.
artikel
30 A shared memory architecture for parallel cyclic reference counting Lins, Rafael D.
1991
32 1-5 p. 53-58
6 p.
artikel
31 A simulation-based system for testing real-time embedded software in the host environment Honka, Hannu
1991
32 1-5 p. 127-134
8 p.
artikel
32 A stable transactional memory for building robust object oriented programs Muller, Gilles
1991
32 1-5 p. 359-363
5 p.
artikel
33 A VLSI — CAD system for efficient design of CMOS/390 processors Tietz, A.
1991
32 1-5 p. 227-234
8 p.
artikel
34 CAD for verified hardware design via category theory Zimmer, Robert
1991
32 1-5 p. 691-698
8 p.
artikel
35 Chairman's introduction Judmann, Kurt P.
1991
32 1-5 p. vii-
1 p.
artikel
36 Compilation techniques for a high level language processor Watson, B.W.
1991
32 1-5 p. 29-36
8 p.
artikel
37 Concept for aelf-calibrating floatingpoint-converter for audio-applications Mitterbauer, Raimund
1991
32 1-5 p. 717-719
3 p.
artikel
38 Control policies for interconected distributed systems via an HIPPI switch Chlamtac, Imrich
1991
32 1-5 p. 575-582
8 p.
artikel
39 Data consistency in a multiprocessor system with ‘store in’ cache concept Doettling, Gerhard
1991
32 1-5 p. 215-219
5 p.
artikel
40 Data path synthesis from a microcontroller instruction set specification in microsyn Haeck, H.-G.
1991
32 1-5 p. 193-198
6 p.
artikel
41 Deriving protocol specifications from service specifications including parameters Kapus-Kolar, Monika
1991
32 1-5 p. 731-738
8 p.
artikel
42 Design and implementation of a distributed real-time expert-system for fault diagnosis in modular manufacturing systems Brenner, E.
1991
32 1-5 p. 799-806
8 p.
artikel
43 Design of a custom dram storage unit coupled to i486(tm) Peter, Jean-Luc
1991
32 1-5 p. 179-181
3 p.
artikel
44 Detection of multiple stuck-on/stuck-open faults by single faults test sets in MOS transistor networks Darlay, François
1991
32 1-5 p. 783-789
7 p.
artikel
45 DFG: a graph based approach for algorithmic flow driven architecture synthesis Antola, A.
1991
32 1-5 p. 683-690
8 p.
artikel
46 3D hardware packages for parallel architectures Bechennec, J.-L.
1991
32 1-5 p. 171-177
7 p.
artikel
47 DSP-architecture design with a Petri-net-based simulator Rautiola, Kyösti
1991
32 1-5 p. 565-572
8 p.
artikel
48 Editorial Board 1991
32 1-5 p. IFC-
1 p.
artikel
49 Efficient access method for multi-dimensional complex objects in spatial databases: BR tree Hwang, Byung Y.
1991
32 1-5 p. 765-772
8 p.
artikel
50 Fault tolerance for highly parallel computers Dal Cin, M.
1991
32 1-5 p. 237-241
5 p.
artikel
51 Fault tolerant aspects of a dynamic dataflow architecture — PATTSY Lakshmi Narasimhan, V.
1991
32 1-5 p. 243-252
10 p.
artikel
52 Formalizing the design-trajectory of sequential machines in 't Veld, R.J.Huis
1991
32 1-5 p. 531-538
8 p.
artikel
53 From a high level description of an IC to silicium: Don't loose design intent Torre, Fermín Calvo
1991
32 1-5 p. 413-415
3 p.
artikel
54 Global checkpointing scheme for heterogeneous distributed database systems Lim, Jong T.
1991
32 1-5 p. 747-754
8 p.
artikel
55 Iiistological image understanding by error backpropagation Refenes, A.N.
1991
32 1-5 p. 437-446
10 p.
artikel
56 Implementation and design of PVD: An interactive protocol specification and validation environment Huang, K.C.
1991
32 1-5 p. 281-288
8 p.
artikel
57 Implementing Prolog on a DAP/Multi-transputer computer Kacsuk, Peter
1991
32 1-5 p. 471-478
8 p.
artikel
58 Improving the division instruction of application-specific RISCs Anido, M.Lois
1991
32 1-5 p. 13-21
9 p.
artikel
59 Interprocess communication with multicast support in DMINIX operating system Rong Tsai, Shang
1991
32 1-5 p. 145-152
8 p.
artikel
60 Issues in the implementation of Prolog, and their optimization Lock, Hendrik C.R.
1991
32 1-5 p. 505-514
10 p.
artikel
61 Knowledge-based segmentation using morphological filters Neejärvi, Jukka
1991
32 1-5 p. 447-452
6 p.
artikel
62 Language and runtime support for distributed object groups Schill, Alexander
1991
32 1-5 p. 271-279
9 p.
artikel
63 LISAS — Simulation tool for regular networks of finite state machines Müller-Wipperfürth, T.
1991
32 1-5 p. 651-656
6 p.
artikel
64 LISAS — Simulation tool for regular networks of finite state machines Müller-Wipperfürth, T.
1991
32 1-5 p. 645-650
6 p.
artikel
65 Micro-instruction placement by simulated annealing Fernandes, Edil S.T.
1991
32 1-5 p. 23-28
6 p.
artikel
66 Minimizing the maximum lateness in real-time computations with extended deadlines Tu, Peng
1991
32 1-5 p. 119-126
8 p.
artikel
67 Mixed level test generation for high fault coverage Hübner, U.
1991
32 1-5 p. 791-796
6 p.
artikel
68 Multiple stuck-at faults detection in CMOS combinational gates Buonanno, G.
1991
32 1-5 p. 775-782
8 p.
artikel
69 MULTIPLUS: A modular high-performance multiprocessor Aude, J.S.
1991
32 1-5 p. 45-52
8 p.
artikel
70 Multiprocessor based image coding Silva, V.
1991
32 1-5 p. 343-348
6 p.
artikel
71 Object-oriented modelling in digital circuit CAD systems Charlton, Colin
1991
32 1-5 p. 93-100
8 p.
artikel
72 Object oriented system analysis for VLSI Hu, Yun-Chao
1991
32 1-5 p. 101-108
8 p.
artikel
73 On hardware for generating routes in Kautz digraphs Smit, Gerard J.M.
1991
32 1-5 p. 593-599
7 p.
artikel
74 On the specification and implementation of X.25 using CSP and OCCAM Van Trees, Stephen P.
1991
32 1-5 p. 739-744
6 p.
artikel
75 Opart: A hardware-description language for test generation Sziray, József
1991
32 1-5 p. 525-530
6 p.
artikel
76 Optimization and architectural evaluation of regular combinatoric structures Eisele, Veronika
1991
32 1-5 p. 69-73
5 p.
artikel
77 Parallelising C++-programs for transputer systems Ungerer, Theo
1991
32 1-5 p. 463-470
8 p.
artikel
78 Parallel solution of state-estimation on an IBM ring network Wallach, Y.
1991
32 1-5 p. 817-824
8 p.
artikel
79 Performance evaluation of transputer systems with linear algebra problems Fernández, A.
1991
32 1-5 p. 825-832
8 p.
artikel
80 Program chairman's introduction Núñez, Antonio
1991
32 1-5 p. ix-x
nvt p.
artikel
81 Prolog on a RISC: Implementation and evaluation Berger Sabbatel, Gilles
1991
32 1-5 p. 497-504
8 p.
artikel
82 Quality control in textile industry via machine vision Erényi, István
1991
32 1-5 p. 807-813
7 p.
artikel
83 Remarks on the use of Reed-Solomon codes in signature analysis Pataricza, András
1991
32 1-5 p. 843-850
8 p.
artikel
84 Scheduling in a continuous area-time design space Cortadella, Jordl
1991
32 1-5 p. 199-206
8 p.
artikel
85 Session A2: Multiprocessor Lent, Bogdan
1991
32 1-5 p. 37-
1 p.
artikel
86 Session A4: Object orientied VLSI design Jozwiak, :Lech
1991
32 1-5 p. 83-84
2 p.
artikel
87 Session A3: Optimization of high speed digital circuits Eshraghian, Kamran
1991
32 1-5 p. 59-60
2 p.
artikel
88 Session A1: Topics on computer architecture Eduardo Sanchez,
1991
32 1-5 p. 11-
1 p.
artikel
89 Session B1: Design and testing of real-time systems Karjalainen, :Jukka
1991
32 1-5 p. 109-
1 p.
artikel
90 Session B3: Hardware building block Krzystof Kuchinski,
1991
32 1-5 p. 161-
1 p.
artikel
91 Session B2: Operating systems issues in parallel processing 1991
32 1-5 p. 135-
1 p.
artikel
92 Session B4: VLSI synthesis Zima, Hans P.
1991
32 1-5 p. 183-
1 p.
artikel
93 Session C3: Advances in object oriented design Konrad Klöckner,
1991
32 1-5 p. 261-
1 p.
artikel
94 Session C4: Architectural Synthesis A. Nuñez,
1991
32 1-5 p. 297-
1 p.
artikel
95 Session C1: CMOS implementation of the IBM ESA/390 N. Roethe,
1991
32 1-5 p. 207-
1 p.
artikel
96 Session C2: Fault tolerant parallel systems 1991
32 1-5 p. 235-
1 p.
artikel
97 Session chairpersons' addresses 1991
32 1-5 p. 869-871
3 p.
artikel
98 Session D2: Fault tolerant parallel software Cin, Mario Dal
1991
32 1-5 p. 357-
1 p.
artikel
99 Session D2: Fault tolerant parallel software Carpenter, Geoffrey F.
1991
32 1-5 p. 373-380
8 p.
artikel
100 Session D2: Fault tolerant parallel software Clematis, Andrea
1991
32 1-5 p. 365-372
8 p.
artikel
101 Session D1: Image processing 1991
32 1-5 p. 333-
1 p.
artikel
102 Session D3: Program development environments Peter Milligan, :
1991
32 1-5 p. 381-
1 p.
artikel
103 Session D4: VLSI design and routing Pawlak, Adam
1991
32 1-5 p. 411-
1 p.
artikel
104 Session E4: Hardware description languages Pawlak, Adam
1991
32 1-5 p. 515-
1 p.
artikel
105 Session E1: Image recognition Stavros Karkanis, :
1991
32 1-5 p. 435-
1 p.
artikel
106 Session E2: Parallel program development Zima, : Hans P.
1991
32 1-5 p. 461-
1 p.
artikel
107 Session E3: Prolog Mari, Ricardo Peña
1991
32 1-5 p. 487-
1 p.
artikel
108 Session F1: Digital signal processing von Puttkamer, Ewald
1991
32 1-5 p. 539-
1 p.
artikel
109 Session F2: Interconnection networks for multiprocessors Lopez Zapata, Emilio
1991
32 1-5 p. 573-
1 p.
artikel
110 Session F3: System design Leon, Gonzalo
1991
32 1-5 p. 601-
1 p.
artikel
111 Session F5: The ESPRIT-PATRICIA project Gerry Musgrave, :
1991
32 1-5 p. 665-
1 p.
artikel
112 Session F4: VLSI design tools 1991
32 1-5 p. 635-
1 p.
artikel
113 Session G1: Control applications Lorenzo Mezzalira, :
1991
32 1-5 p. 699-700
2 p.
artikel
114 Session G3: Database systems Gonzalo Leon, :
1991
32 1-5 p. 745-
1 p.
artikel
115 Session G2: Network communication protocols Jacques Tiberghien, :
1991
32 1-5 p. 721-
1 p.
artikel
116 Session G4: VLSI testing and modelling I Painke, Helmut
1991
32 1-5 p. 773-
1 p.
artikel
117 Session H2: Evaluation of parallel systems Wilson, : Derek R.
1991
32 1-5 p. 815-
1 p.
artikel
118 Session H1: Quality control Gianfranco Ciccarella, :
1991
32 1-5 p. 797-
1 p.
artikel
119 Session H3: Testing methods Fausto Distante, :
1991
32 1-5 p. 833-
1 p.
artikel
120 Session H4: VLSI testing and fault modelling II Helmut Painke,
1991
32 1-5 p. 851-
1 p.
artikel
121 Session K3: Keynote session Francis Jutand,
1991
32 1-5 p. 9-
1 p.
artikel
122 Session K2: Keynote session Nuñez, :Antonio
1991
32 1-5 p. 5-8
4 p.
artikel
123 Session K1: Opening and keynote session Judmann, :Kurt P.
1991
32 1-5 p. 1-
1 p.
artikel
124 Simulation and visualization tools for link-based parallel architectures Luque, E.
1991
32 1-5 p. 479-486
8 p.
artikel
125 Software life cycle management based on a phase distinction method Lehner, Franz
1991
32 1-5 p. 603-608
6 p.
artikel
126 Software quality management Wallmüller, Ernest
1991
32 1-5 p. 609-616
8 p.
artikel
127 Speed-area-power optimization for DCFL and SDCFL class of logic using ring notation Eshraghian, K.
1991
32 1-5 p. 75-82
8 p.
artikel
128 Strategy of one and half layer routing Servít, Michal
1991
32 1-5 p. 417-423
7 p.
artikel
129 Task level behavioral hardware description Benders, L.P.M.
1991
32 1-5 p. 323-331
9 p.
artikel
130 Temporal control improvement of hidden Markov models for automatic speech recognition Dours-Senac, Christine
1991
32 1-5 p. 549-556
8 p.
artikel
131 Testability measure with reconvergent fanout analysis and its applications Gu, Xinli
1991
32 1-5 p. 835-842
8 p.
artikel
132 The clock, test and maintenance control chip of the IBM ES/9221 Schmunkamp, Dietmar
1991
32 1-5 p. 221-226
6 p.
artikel
133 The design and implementation of VOOM: a parallel virtual Object Oriented machine Balou, A.T.
1991
32 1-5 p. 289-296
8 p.
artikel
134 The determination of angular values and parameters in flat surfaces: from the mathematical approach to the CORDIC architecture Alippi, Cesare
1991
32 1-5 p. 349-355
7 p.
artikel
135 The need for a core method DIALOG — Linking formal proof to the design environment Mayger, E.M.
1991
32 1-5 p. 667-673
7 p.
artikel
136 The Patricia testability analysis tool Hadjinicolaeu, M.
1991
32 1-5 p. 675-682
8 p.
artikel
137 Towards a development environment for fifth generation systems Sorensen, H.
1991
32 1-5 p. 489-496
8 p.
artikel
138 Towards an optimal combination of error detection mechanisms Steininger, Andreas
1991
32 1-5 p. 253-259
7 p.
artikel
139 Transnet: A method for transformational development of embedded software Sacha, Krzysztof
1991
32 1-5 p. 617-624
8 p.
artikel
140 TVA: A timing verifier with analytic temporal modelling Navarro, D.
1991
32 1-5 p. 637-644
8 p.
artikel
141 Use of mathematical procedures for the task of power measurement and the corresponding VLSI-realization Rauscher, R.
1991
32 1-5 p. 163-169
7 p.
artikel
142 Visual languages their definition and applications in system development El-Kassas, S.
1991
32 1-5 p. 383-391
9 p.
artikel
143 VLSI integrated circuit design representation in an object-oriented CAD environment Wrona, Wlodzimiers
1991
32 1-5 p. 85-92
8 p.
artikel
                             143 gevonden resultaten
 
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