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                             124 gevonden resultaten
nr titel auteur tijdschrift jaar jaarg. afl. pagina('s) type
1 A 32-bit RISC CPU implemented in GaAs Geideman, William A.
 1990
 30 1-5 p. 127-133
7 p.
 artikel
2 A bus-monitor unit for fault-tolerant system configurations Markas, Tassos
 1990
 30 1-5 p. 521-527
7 p.
 artikel
3 A case study in the migration of software to hardware using basics Spaanenburg, L.
 1990
 30 1-5 p. 263-270
8 p.
 artikel
4 A cellular architecture dedicated to neural net emulation Faure, Bernard
 1990
 30 1-5 p. 249-255
7 p.
 artikel
5 A deadlock-free communication kernel for loop connected message passing computer architecture Pramanik, P.
 1990
 30 1-5 p. 703-712
10 p.
 artikel
6 A DSP processor with a powerful set of elementary arithmetic operations based on cordic and CCM algorithms Metafas, Dimitris E
 1990
 30 1-5 p. 51-57
7 p.
 artikel
7 A generator for a number format conversion IC Kyrloglou, N.A.
 1990
 30 1-5 p. 237-240
4 p.
 artikel
8 A hardware implementation of a modified DES-algorithm Kropf, T
 1990
 30 1-5 p. 59-65
7 p.
 artikel
9 A mixed implementation of a real-time system Andre, Charles
 1990
 30 1-5 p. 397-402
6 p.
 artikel
10 An approach to a design for testability personal consultant Buonanno, G.
 1990
 30 1-5 p. 405-412
8 p.
 artikel
11 An environment for parallel programming in PASCAL Vasconcelos, Nelson Q.
 1990
 30 1-5 p. 365-370
6 p.
 artikel
12 A new comparison-based scheme for multiprocessor fault tolerance Xu, Jie
 1990
 30 1-5 p. 617-623
7 p.
 artikel
13 A new solution of coherence protocol for tightly coupled multiprocessor systems Prete, Cosimo Antonio
 1990
 30 1-5 p. 207-214
8 p.
 artikel
14 Animation prototyping of formal specifications of real-time systems Hughes, T.S.
 1990
 30 1-5 p. 381-388
8 p.
 artikel
15 An interactive environment for hardware/software system design at the specification level Antoniazzi, S.
 1990
 30 1-5 p. 545-553
9 p.
 artikel
16 An object oriented design and simulation system for VLSI Verschueren, Ad.C.
 1990
 30 1-5 p. 241-246
6 p.
 artikel
17 An Occam-based evaluation of a parallel version of simulated annealing Barbosa, Valmir C
 1990
 30 1-5 p. 85-92
8 p.
 artikel
18 A parallel architecture for real-time video coding de Sá, Luís
 1990
 30 1-5 p. 439-445
7 p.
 artikel
19 A performance analysis of toroidal mesh networks Macharia, Geoffrey M.
 1990
 30 1-5 p. 675-682
8 p.
 artikel
20 Application and implementation of window-based image processing algorithms Vajda, Ferenc
 1990
 30 1-5 p. 447-454
8 p.
 artikel
21 A rational methodology for design of new computer structures Pissaloux, Edwige E.
 1990
 30 1-5 p. 555-560
6 p.
 artikel
22 Architectural support for operating systems: A popular RISC vs. a popular CISC Karshmer, A.I
 1990
 30 1-5 p. 21-32
12 p.
 artikel
23 A risc central processing unit for a massivelly parallel architecture Cappello, F
 1990
 30 1-5 p. 33-39
7 p.
 artikel
24 Assessing the diagnostic power of test pattern sets Camurati, P.
 1990
 30 1-5 p. 413-419
7 p.
 artikel
25 ASTRA: An associative RISC-Architecture Tavangarian, D
 1990
 30 1-5 p. 41-48
8 p.
 artikel
26 A transputer-based gate-level fault simulator Cabodi, G.
 1990
 30 1-5 p. 529-534
6 p.
 artikel
27 A transputer based implementation of the VOXAR project Pitot, P.
 1990
 30 1-5 p. 347-353
7 p.
 artikel
28 Author index 1990
 30 1-5 p. 719-724
6 p.
 artikel
29 Behavioral circuit description on system level Wienkop, Uwe
 1990
 30 1-5 p. 561-566
6 p.
 artikel
30 Case tool support for requirements capture and analysis McChesney, I.
 1990
 30 1-5 p. 281-288
8 p.
 artikel
31 Chairman's introduction Stevens, Mario
 1990
 30 1-5 p. vii-
1 p.
 artikel
32 CMOS layout generation for improved testability Stern, Olaf
 1990
 30 1-5 p. 509-512
4 p.
 artikel
33 Computational logic unit for a microprogrammed data acquisition system: an evaluation prototype Bragagnini, Walter
 1990
 30 1-5 p. 67-74
8 p.
 artikel
34 Constructing real-time multi-channel protocols Kapus-Kolar, M.
 1990
 30 1-5 p. 485-490
6 p.
 artikel
35 Co-programming: A tool for the development of software for massively parallel computers Pissaloux, Edwige E.
 1990
 30 1-5 p. 569-576
8 p.
 artikel
36 Data flow methods in the design of parallel computing systems Tyrrell, Andrew M.
 1990
 30 1-5 p. 585-591
7 p.
 artikel
37 Designing a parallel object-oriented compiler target language (TOOL) Balou, A.T.
 1990
 30 1-5 p. 457-465
9 p.
 artikel
38 Designing high performance instruction caches in VLSI Bormans, J.E.H.M.
 1990
 30 1-5 p. 135-142
8 p.
 artikel
39 Design of a transputer network for searching neighbours in M.D. simulations Bekker, H.
 1990
 30 1-5 p. 159-165
7 p.
 artikel
40 Distributed simulation of computer networks Dirkx, Erik
 1990
 30 1-5 p. 215-220
6 p.
 artikel
41 Dynamic load balancing in transputer applications with geometric parallelism Joosen, W
 1990
 30 1-5 p. 77-84
8 p.
 artikel
42 Editorial Board 1990
 30 1-5 p. IFC-
1 p.
 artikel
43 EIKON: A software library for image processing applications Parthenis, K.
 1990
 30 1-5 p. 333-339
7 p.
 artikel
44 Enhancing a control graph based HDL for performance evaluation of simulated architectures Gajda, Ryszard
 1990
 30 1-5 p. 683-691
9 p.
 artikel
45 Evaluation of the optimal strategy for managing the register file Arregi, Olatz
 1990
 30 1-5 p. 143-150
8 p.
 artikel
46 Experimental evaluation of a set of simple error detection mechanisms Madeira, Henrique
 1990
 30 1-5 p. 513-520
8 p.
 artikel
47 From program to hardware: A parallel architecture compiler Auguin, M.
 1990
 30 1-5 p. 467-474
8 p.
 artikel
48 Integrating intermediate code optimization with retargetable code generation Accomazzo, E.
 1990
 30 1-5 p. 475-481
7 p.
 artikel
49 Join optimization in distributed databases on broadcast network Ahn, Jong K.
 1990
 30 1-5 p. 637-644
8 p.
 artikel
50 Keynote address K3: Responsive systems (the challenge for the nineties) Malek, M
 1990
 30 1-5 p. 9-16
8 p.
 artikel
51 Keynote address K1: Small and medium sized industries (SMI) Schwippert, G.A
 1990
 30 1-5 p. 3-
1 p.
 artikel
52 Keynote address K4: The state of global printing in the '90s Adams, Robert V
 1990
 30 1-5 p. 17-
1 p.
 artikel
53 Keynote address K2: The strategic importance of microcomputing for the business environment Dinklo, J.A
 1990
 30 1-5 p. 5-8
4 p.
 artikel
54 Message passing via singly-buffered channels: an efficient & flexible communications control mechanism Refenes, Apostolos N.
 1990
 30 1-5 p. 645-653
9 p.
 artikel
55 Occam implementation of path-disjoint routing on the Hathi-2 transputer system Shen, Hong
 1990
 30 1-5 p. 93-100
8 p.
 artikel
56 On the formal specification and verification of digital circuits de Graaff, Peter J.
 1990
 30 1-5 p. 537-544
8 p.
 artikel
57 Opening address: Hardware and software in system engineering Fay, D.Q.M
 1990
 30 1-5 p. 1-2
2 p.
 artikel
58 Parallel Applications Tiberghien, J.
 1990
 30 1-5 p. 75-
1 p.
 artikel
59 Parallel processing III 1990
 30 1-5 p. 655-
1 p.
 artikel
60 Partitioned algorithms for gaussian elimination on reconfigurable processor arrays Maresca, M.
 1990
 30 1-5 p. 153-158
6 p.
 artikel
61 PASS: High level synthesis Ewering, Christian
 1990
 30 1-5 p. 103-108
6 p.
 artikel
62 Performance analysis of a multiprocessor machine based on data flow principles Narayan, Ranjani
 1990
 30 1-5 p. 601-608
8 p.
 artikel
63 Petri nets in logic Domenici, Andrea
 1990
 30 1-5 p. 193-198
6 p.
 artikel
64 Pipelining a memory based CISC processor Smeets, J.P.C.F.H.
 1990
 30 1-5 p. 665-672
8 p.
 artikel
65 Program chairman's introduction 1990
 30 1-5 p. ix-x
nvt p.
 artikel
66 Program development within the mathematician's devil Benson, T.J.G.
 1990
 30 1-5 p. 593-597
5 p.
 artikel
67 Programme Committee 1990
 30 1-5 p. xi-
1 p.
 artikel
68 Quasi dynamic approach to layout compaction Balakrishnan, S.
 1990
 30 1-5 p. 231-236
6 p.
 artikel
69 Random logic circuit implementation of extended Timed Petri Nets Patel, Mikael R.K.
 1990
 30 1-5 p. 313-319
7 p.
 artikel
70 Real-time functional programming systems Winter, S.C.
 1990
 30 1-5 p. 491-497
7 p.
 artikel
71 Recovery meta program in Unix based environment Clematis, A.
 1990
 30 1-5 p. 371-378
8 p.
 artikel
72 Reverse engineering and data flow diagrams in ADA environment Canfora, G.
 1990
 30 1-5 p. 357-364
8 p.
 artikel
73 Reviewers 1990
 30 1-5 p. xi-xii
nvt p.
 artikel
74 Section B4: Parallel processing I 1990
 30 1-5 p. 199-
1 p.
 artikel
75 Session A1: RISC systems 1990
 30 1-5 p. 19-
1 p.
 artikel
76 Session A2: Signal processing — I 1990
 30 1-5 p. 49-
1 p.
 artikel
77 Session A4: System design I 1990
 30 1-5 p. 101-
1 p.
 artikel
78 Session B3: Formal issues 1990
 30 1-5 p. 175-
1 p.
 artikel
79 Session B: Signal - II Wilson, D.
 1990
 30 1-5 p. 151-
1 p.
 artikel
80 Session B1: VLSI architectures 1990
 30 1-5 p. 125-
1 p.
 artikel
81 Session Chairpersons 1990
 30 1-5 p. xii-
1 p.
 artikel
82 Session chairpersons' address 1990
 30 1-5 p. 713-714
2 p.
 artikel
83 Session C2: Neural networks 1990
 30 1-5 p. 247-
1 p.
 artikel
84 Session C3: Software engineering I 1990
 30 1-5 p. 271-272
2 p.
 artikel
85 Session C1: VLSI Design I 1990
 30 1-5 p. 221-222
2 p.
 artikel
86 Session D2: Image processing I 1990
 30 1-5 p. 331-
1 p.
 artikel
87 Session D4: Real time systems I 1990
 30 1-5 p. 379-380
2 p.
 artikel
88 Session D3: Software engineering II 1990
 30 1-5 p. 355-
1 p.
 artikel
89 Session D1: VLSI design II 1990
 30 1-5 p. 303-
1 p.
 artikel
90 Session E3: Compilation issues 1990
 30 1-5 p. 455-456
2 p.
 artikel
91 Session E2: Image processing II 1990
 30 1-5 p. 429-
1 p.
 artikel
92 Session E4: Real Time Systems II Halang, W.A.
 1990
 30 1-5 p. 483-
1 p.
 artikel
93 Session E1: VLSI specification and verification 1990
 30 1-5 p. 403-
1 p.
 artikel
94 Session F1: Fault tolerance and testing 1990
 30 1-5 p. 507-
1 p.
 artikel
95 Session F3: Parallel software development 1990
 30 1-5 p. 567-
1 p.
 artikel
96 Session F2: System design II 1990
 30 1-5 p. 535-
1 p.
 artikel
97 Session G3: Distributed systems 1990
 30 1-5 p. 625-
1 p.
 artikel
98 Session G1: Parallel processing II 1990
 30 1-5 p. 599-
1 p.
 artikel
99 Session H3: Interprocess communication 1990
 30 1-5 p. 693-
1 p.
 artikel
100 Session H2: System design III 1990
 30 1-5 p. 673-
1 p.
 artikel
101 Simultaneous decompositions of sequential machines Jóźwiak, Lech
 1990
 30 1-5 p. 305-312
8 p.
 artikel
102 Solution in software crisis Auer, Antti
 1990
 30 1-5 p. 273-280
8 p.
 artikel
103 Special architecture for high-performance scan conversion Franken, P.B.
 1990
 30 1-5 p. 431-438
8 p.
 artikel
104 Statecharts based requirements analysis: Deriving user oriented models Jokela, Timo
 1990
 30 1-5 p. 289-296
8 p.
 artikel
105 Stepwise decomposition in controlpath synthesis ten Berg, A.J.W.M
 1990
 30 1-5 p. 117-124
8 p.
 artikel
106 Subject index 1990
 30 1-5 p. 715-717
3 p.
 artikel
107 Supporting testing of specifications and implementations Arkko, Jari
 1990
 30 1-5 p. 297-302
6 p.
 artikel
108 Synthesis of programmable control structures for a simulation speed-up Dubois, Jean-Luc
 1990
 30 1-5 p. 223-229
7 p.
 artikel
109 System architecture of a modular neural network using 400 simple processors Hoekstra, J.
 1990
 30 1-5 p. 257-262
6 p.
 artikel
110 System level VLSI design Stevens, M.P.J.
 1990
 30 1-5 p. 321-329
9 p.
 artikel
111 Systolic architecture for the calculation of the correlation coefficients Zapata, E.L.
 1990
 30 1-5 p. 609-616
8 p.
 artikel
112 TAM: Temporal agent model for real-time distributed systems Scholefield, D.
 1990
 30 1-5 p. 499-506
8 p.
 artikel
113 The COIN model for concurrent computation and its implementation Buhler, Peter
 1990
 30 1-5 p. 577-584
8 p.
 artikel
114 The interactive space-time scheduler Lisper, Björn
 1990
 30 1-5 p. 109-116
8 p.
 artikel
115 The IRCAM signal processing workstation — An environment for research in real-time musical signal processing and performance Lindemann, Eric
 1990
 30 1-5 p. 167-174
8 p.
 artikel
116 The OTTER environment for resolution-based proof of hardware correctness Camurati, Paolo
 1990
 30 1-5 p. 421-428
8 p.
 artikel
117 The role of languages in the design-trajectory Huis in 't Veld, R.J.
 1990
 30 1-5 p. 177-183
7 p.
 artikel
118 The specification and design of hard real-time systems using timed and temporal petri nets Sagoo, J.S.
 1990
 30 1-5 p. 389-396
8 p.
 artikel
119 The synthesis of deadlock-free interprocess communications Carpenter, Geoffrey F.
 1990
 30 1-5 p. 695-701
7 p.
 artikel
120 Towards a parallel inference machine: the APIM project Vlahavas, J.
 1990
 30 1-5 p. 201-206
6 p.
 artikel
121 Towards the verification of optimizing transformations for imperative programs Kock, Gerd
 1990
 30 1-5 p. 185-192
8 p.
 artikel
122 TVNet II: A cable TV based metropolitan area network using the KEDS protocol Karshmer, Arthur I.
 1990
 30 1-5 p. 627-635
9 p.
 artikel
123 Vector addressing processor for direct and indirect accesses Dekeyser, J.-L.
 1990
 30 1-5 p. 657-664
8 p.
 artikel
124 VOXEL based modeling and rendering irregular solids Prakash, C.E.
 1990
 30 1-5 p. 341-346
6 p.
 artikel
                             124 gevonden resultaten
 
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