Digitale Bibliotheek
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                             64 gevonden resultaten
nr titel auteur tijdschrift jaar jaarg. afl. pagina('s) type
1 A deadlock detection algorithm for nested transaction model Shin, Dong C.
1990
28 1-5 p. 9-14
6 p.
artikel
2 A demand-driven macro-dataflow schema for distributed graph reduction on multiple G-machines Biswas, Prasenjit
1990
28 1-5 p. 161-166
6 p.
artikel
3 A function oriented architecture for process control systems minimising internal data transfer costs Halang, Wolfgang A.
1990
28 1-5 p. 123-128
6 p.
artikel
4 A general framework for extraction of VLSI pipeline structures Fjellborg, Björn
1990
28 1-5 p. 305-310
6 p.
artikel
5 A knowledge-based framework for VLSI design Loupis, M.I.
1990
28 1-5 p. 327-331
5 p.
artikel
6 A machine-vision quality inspection system for textile industries supported by parallel multitransputer architecture Karkanis, S.
1990
28 1-5 p. 247-252
6 p.
artikel
7 A multi-layer transputer network for efficient parallel execution of OCCAM programs Szturmowicz, Miroslaw
1990
28 1-5 p. 133-138
6 p.
artikel
8 An approach to minimal-time scheduling of micro-operations Sotelo, Alfonso
1990
28 1-5 p. 301-304
4 p.
artikel
9 An automatic computer vision system for blood analysis Parthenis, K.
1990
28 1-5 p. 243-246
4 p.
artikel
10 An engine signal simulator Varchmin, U.
1990
28 1-5 p. 219-222
4 p.
artikel
11 An environment for teaching “program design” by exercises Comar, C.
1990
28 1-5 p. 259-264
6 p.
artikel
12 A new concept for chip architecture design — Interactive architecture compilation from system specification to register-transfer algorithms Wienkop, Uwe
1990
28 1-5 p. 319-322
4 p.
artikel
13 An experiment on PC-based automated extraction of electrical parameters for VLSI MOSFETs: Methods, algorithms, and implementation Bampi, Sergio
1990
28 1-5 p. 277-282
6 p.
artikel
14 An interworking mechanism between LAN & WAN and implementation method Hanaki, Miyoshi
1990
28 1-5 p. 59-62
4 p.
artikel
15 An object oriented logic simulator Hollant, T.
1990
28 1-5 p. 311-313
3 p.
artikel
16 An overview of the sysedit chip design environment Rust, Stefan
1990
28 1-5 p. 315-318
4 p.
artikel
17 APES — Implementation of a CAD tool for array processor design: Textual definition versus graphic description Distante, Fausto
1990
28 1-5 p. 63-67
5 p.
artikel
18 A portable real-time kernel for 8086/80186/80286/80386 based systems on IBM-PC Raja, D.
1990
28 1-5 p. 145-150
6 p.
artikel
19 Area compaction in silicon structures for neural net implementation Distante, F.
1990
28 1-5 p. 139-143
5 p.
artikel
20 Arithmetical logical unit design for a processor with BILBO techniques: Functional simulation and test strategies Martinez, M.
1990
28 1-5 p. 109-115
7 p.
artikel
21 A structured approach to expert systems development: The methodology and a real world case study Grimaldi, P.
1990
28 1-5 p. 191-196
6 p.
artikel
22 Author index 1990
28 1-5 p. 333-337
5 p.
artikel
23 Automatic reconfigurable transputer networks — A new direction in parallel processing for robotic applications Strickland, P.
1990
28 1-5 p. 223-228
6 p.
artikel
24 Building an expert system for software quality evaluation Bukovsky, Nikolay S.
1990
28 1-5 p. 179-182
4 p.
artikel
25 CLD:- A novel approach to dynamic load balancing Macharia, Geoffrey M.
1990
28 1-5 p. 43-47
5 p.
artikel
26 Computing models in designing Alderighi, Monica
1990
28 1-5 p. 173-177
5 p.
artikel
27 Concurrent architectures for real-time signal processing Baraniecki, Anna Z.
1990
28 1-5 p. 233-238
6 p.
artikel
28 Constructing communication protocols on reliable bounded FIFO channels without overspecification Kapus-Kolar, M.
1990
28 1-5 p. 55-58
4 p.
artikel
29 Controlling industrial processes with a dataflow industrial controller: A way to achieve better performances Žumer, Viljem
1990
28 1-5 p. 95-99
5 p.
artikel
30 CSL: A class specification language for object-oriented design Bucci, G.
1990
28 1-5 p. 201-204
4 p.
artikel
31 Debugging and monitoring highly parallel systems with grip Venables, P.J.
1990
28 1-5 p. 79-84
6 p.
artikel
32 Design principles of the ATHENA software maintainability toll Christodoulakis, D.N.
1990
28 1-5 p. 183-189
7 p.
artikel
33 Editorial Board 1990
28 1-5 p. IFC-
1 p.
artikel
34 Expansion of LOTOS behaviour expressions as an exercise in transformational design Delgado Kloos, Carlos
1990
28 1-5 p. 3-8
6 p.
artikel
35 Global optimisation of fault-tolerant allocation of concurrent communicating processes in distributed environments Piuri, Vincenzo
1990
28 1-5 p. 31-35
5 p.
artikel
36 Grammar controlled specification and design of program systems Pietschker, Lutz
1990
28 1-5 p. 205-209
5 p.
artikel
37 Hardware design of the multris microprocessor Leeuwrik, G.
1990
28 1-5 p. 117-122
6 p.
artikel
38 Implementing pattern-matching function definitions in CTDNet—a multiprocessor architecture Gupta, J.P.
1990
28 1-5 p. 151-155
5 p.
artikel
39 Improving DSP software productivity using an optimising Pascal compiler for the AT&T DSP32C Crookes, D.
1990
28 1-5 p. 239-242
4 p.
artikel
40 Letter from the short-note editor, EUROMICRO 89 1990
28 1-5 p. v-
1 p.
artikel
41 Multiple vs. single inheritance in object-oriented programming languages Bretthauer, Harry
1990
28 1-5 p. 197-200
4 p.
artikel
42 Multiprocessor performances for dynamic programming Chardonnens, B.
1990
28 1-5 p. 91-94
4 p.
artikel
43 One-chip low-power multiprocessor Perotto, J-F.
1990
28 1-5 p. 129-132
4 p.
artikel
44 On the use of process migration in distributed systems Joosen, W.
1990
28 1-5 p. 49-52
4 p.
artikel
45 Parallel algorithms for SIMD computers de O. Cruz, Adriano J.
1990
28 1-5 p. 85-90
6 p.
artikel
46 Preliminary design of a parallel SIC architecture Blazek, Zdenek
1990
28 1-5 p. 103-108
6 p.
artikel
47 Probablistic diagnosis in multiprocessor systems Narraway, J.J.
1990
28 1-5 p. 75-78
4 p.
artikel
48 Real time scheduling algorithms and their performances Cobelli, R.
1990
28 1-5 p. 211-216
6 p.
artikel
49 Recent improvements on the concept of conditional critical regions Zehendner, Eberhard
1990
28 1-5 p. 15-18
4 p.
artikel
50 Relationships between real-time and fault tolerance: A case study of a redundant loop data acquisition network Minomi, U.
1990
28 1-5 p. 229-232
4 p.
artikel
51 Scheduling demand-driven parallel logic programs on transputers Su, Shyh-Chang
1990
28 1-5 p. 37-41
5 p.
artikel
52 Simulation of hardware and multitasking for the parallel programming language ParMod Friedrich, Michael
1990
28 1-5 p. 19-23
5 p.
artikel
53 Software productivity in built-in microprocessors Fujimura, Naomi
1990
28 1-5 p. 169-172
4 p.
artikel
54 Subject index 1990
28 1-5 p. 339-341
3 p.
artikel
55 Systool-systolic array programming tool Nissenbaum, Baruch
1990
28 1-5 p. 69-73
5 p.
artikel
56 TAO: A hierarchical design representation for high level synthesis of hardware systems Patel, Mikael R.K
1990
28 1-5 p. 323-326
4 p.
artikel
57 Testability analysis in a VLSI high-level synthesis system Kuchciński, Krzysztof
1990
28 1-5 p. 295-300
6 p.
artikel
58 Testing of serial input convolvers Breveglieri, Luca
1990
28 1-5 p. 283-290
8 p.
artikel
59 The design of open structure engineering databases J. Vogwell,
1990
28 1-5 p. 269-273
5 p.
artikel
60 The evaluation of the N-arch emulator on a transputer network Niar, S.
1990
28 1-5 p. 157-159
3 p.
artikel
61 The use of Estelle to specify manufacturing systems Morisio, M.
1990
28 1-5 p. 253-258
6 p.
artikel
62 Tools for logic-based access to existing databases in distributed environment Slavov, B.
1990
28 1-5 p. 265-268
4 p.
artikel
63 Towards the development of a mathematician's assistant Milligan, P.
1990
28 1-5 p. 25-29
5 p.
artikel
64 Transforming logic simulator output to tester timing descriptions Spanier, Peter
1990
28 1-5 p. 291-294
4 p.
artikel
                             64 gevonden resultaten
 
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