nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
1 |
A database manager for cell based VLSI circuits
|
Sehgal, Naresh K. |
|
1996 |
30 |
1 |
p. 63-71 9 p. |
artikel |
2 |
An update on a maturity benchmarking process for electronic design processes
|
Rosenthal, Charles W. |
|
1996 |
30 |
1 |
p. 5-11 7 p. |
artikel |
3 |
Calendar
|
|
|
1996 |
30 |
1 |
p. 75-76 2 p. |
artikel |
4 |
Editorial Board
|
|
|
1996 |
30 |
1 |
p. ii- 1 p. |
artikel |
5 |
Inter-organizational concurrent engineering: A case study in PCB manufacturing
|
de Graaf, Robert |
|
1996 |
30 |
1 |
p. 37-47 11 p. |
artikel |
6 |
Issues on planning, managing and assessing complex electronic design processes
|
Jacome, Margarida F. |
|
1996 |
30 |
1 |
p. 1-3 3 p. |
artikel |
7 |
Linking requirements and design data for automated functional evaluation
|
Frezza, Stephen T. |
|
1996 |
30 |
1 |
p. 13-25 13 p. |
artikel |
8 |
Managing a RASSP design process: A mid-program review
|
Chung, Moon Jung |
|
1996 |
30 |
1 |
p. 49-61 13 p. |
artikel |
9 |
Safety Engineering
|
van Vuuren, Wim |
|
1996 |
30 |
1 |
p. 73- 1 p. |
artikel |
10 |
Towards a model for electronic design process refinement
|
Johnson, Eric W. |
|
1996 |
30 |
1 |
p. 27-36 10 p. |
artikel |