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                             52 gevonden resultaten
nr titel auteur tijdschrift jaar jaarg. afl. pagina('s) type
1 Accident avoidance and prediction system using adaptive probabilistic threshold monitoring technique Parthasaradhy, P.
71 C p.
 artikel
2 A dsPIC based optimal sizing of solar PV plant using ultra capacitors for transient power delivery Karthikeyan, K.
71 C p.
 artikel
3 An efficient multi-parameter approach for FPGA hardware Trojan detection Fournaris, Apostolos P.
71 C p.
 artikel
4 An efficient non-separable architecture for Haar wavelet transform with lifting structure Bamerni, Serwan Ali
71 C p.
 artikel
5 An α-factor architecture for RS decoder implemented on 90 nm CMOS technology for computer computing applications devices Mageswari, N.
71 C p.
 artikel
6 A robust, real-time and calibration-free lane departure warning system Gamal, Islam
71 C p.
 artikel
7 Attacking SRAM PUFs using very-low-temperature data remanence Anagnostopoulos, Nikolaos Athanasios
71 C p.
 artikel
8 A vedic mathematics based processor core for discrete wavelet transform using FinFET and CNTFET technology for biomedical signal processing Senthilkumar, V.M.
71 C p.
 artikel
9 Balancing elliptic curve coprocessors from bottom to top Pirotte, Niels
71 C p.
 artikel
10 Criticality based reliability against hardware Trojan attacks for processing of tasks on reconfigurable hardware Guha, Krishnendu
71 C p.
 artikel
11 Cross-layer analysis of software fault models and countermeasures against hardware fault attacks in a RISC-V processor Laurent, Johan
71 C p.
 artikel
12 DAMHSE: Programming heterogeneous MPSoCs with hardware acceleration using dataflow-based design space exploration and automated rapid prototyping Suriano, Leonardo
71 C p.
 artikel
13 Deep discriminative correlation tracking based on adaptive feature fusion Yu, Wangsheng
71 C p.
 artikel
14 Demand side management of small scale loads in a smart grid using glow-worm swarm optimization technique C., Puttamadappa
71 C p.
 artikel
15 Design and evaluation of dynamic partial reconfiguration using fault tolerance in asynchronous FPGA Lekashri, S.
71 C p.
 artikel
16 Design and implementation of Least Mean Square adaptive FIR filter using offset binary coding based Distributed Arithmetic Kalaiyarasi, D.
71 C p.
 artikel
17 Design of Differential LNA and Double Balanced Mixer using 180 nm CMOS Technology Kalamani, C.
71 C p.
 artikel
18 Dynamic signal driving strategy based high speed and low powered dual edge triggered flip flop design used memory applications Prithivi Raj, M.
71 C p.
 artikel
19 Editorial Board
71 C p.
 artikel
20 Efficient algorithmic evaluation of correlation power analysis: Key distinguisher based on the correlation trace derivative Socha, Petr
71 C p.
 artikel
21 Efficient separable convolution using field programmable gate arrays Joginipelly, Arjun Kumar
71 C p.
 artikel
22 Embedding Recurrent Neural Networks in Wearable Systems for Real-Time Fall Detection Torti, Emanuele
71 C p.
 artikel
23 Exhaustive single bit fault analysis. A use case against Mbedtls and OpenSSL’s protection on ARM and Intel CPU Carré, Sébastien
71 C p.
 artikel
24 Feasibility of FPGA accelerated IPsec on cloud Vajaranta, Markku
71 C p.
 artikel
25 FINFET operational amplifier with low offset noise and high immunity to electromagnetic interference Senthilkumar, V.M.
71 C p.
 artikel
26 FPGA implementation of IFFT architecture with enhanced pruning algorithm for low power application Geevarghese, Abraham Chavacheril
71 C p.
 artikel
27 Guards in action: First-order SCA secure implementations of KETJE without additional randomness Arribas, Victor
71 C p.
 artikel
28 Hardware accelerator for FIB lookup in named data networking Yu, Weiwen
71 C p.
 artikel
29 High throughput K best MIMO detector using modified final selector based carry select adder Bavithra, K.B.
71 C p.
 artikel
30 Hyper spectral dimensionality reduction using hybrid discriminative local metric learning Venkatesan, R.
71 C p.
 artikel
31 Investigation of modified multilevel inverter topology for PV system Rajalakshmi, Sambasivam
71 C p.
 artikel
32 Investigation of turbo decoding techniques based on lottery arbiter in 3D network on chip Suganthy, M.
71 C p.
 artikel
33 Lattice reduction aided pre-processor for large scale MIMO detection Jiavana, K. Ferents Koni
71 C p.
 artikel
34 LFSR based versatile divider architectures for BCH and RS error correction encoders Basiri M, Mohamed Asan
71 C p.
 artikel
35 Low power and low area VLSI implementation of vedic design FIR filter for ECG signal de-noising Sumalatha, M.
71 C p.
 artikel
36 Low power & high gain differential amplifier using 16 nm FinFET Kasthuri Bha, J.K.
71 C p.
 artikel
37 M-ABRC (Adaptive Binary Range Coder) using Virtual Sliding Window technique and its VLSI implementation Mrudula, S.T.
71 C p.
 artikel
38 Memory streaming acceleration for embedded systems with CPU-accelerator cooperative data processing Lee, Kwangho
71 C p.
 artikel
39 Modeling and adaptive control of modified LUO converter Arumugam, Sivakumar
71 C p.
 artikel
40 Near-memory computing: Past, present, and future Singh, Gagandeep
71 C p.
 artikel
41 On a tool-supported model-based approach for building architectures and roadmaps: The MegaM@Rt2 project experience Sadovykh, Andrey
71 C p.
 artikel
42 Publisher Note
71 C p.
 artikel
43 Reliability characterization and activity analysis of lowRISC internal modules against single event upsets using fault injection and RTL simulation Mohseni, Zeynab
71 C p.
 artikel
44 Serialized lightweight SHA-3 FPGA implementations Jungk, Bernhard
71 C p.
 artikel
45 Test pattern generation using thermometer code counter in TPC technique for BIST implementation Jamal, K.
71 C p.
 artikel
46 Time-predictable distributed shared on-chip memory Petersen, Morten B.
71 C p.
 artikel
47 Understanding multidimensional verification: Where functional meets non-functional Lai, Xinhui
71 C p.
 artikel
48 Undeviating Adaptive Sheltered Cryptography (UASC) method based low power and high secure cache memory design Sai, R. Vijay
71 C p.
 artikel
49 Using Machine Learning for predicting area and Firmware metrics of hardware designs from abstract specifications Servadei, Lorenzo
71 C p.
 artikel
50 VLSI architecture for Vasanth sorting to denoise image with minimum comparators Vasanth, K.
71 C p.
 artikel
51 Voltage deviate-domino circuits for low power high-speed applications using prescient innovation model Arun Prasath, C.
71 C p.
 artikel
52 Wavelength assignment method based on ACO to reduce crosstalk for ring-based optical Network-on-Chip CHU, Zhuqin
71 C p.
 artikel
                             52 gevonden resultaten
 
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