| nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
| 1 |
A CAD approach for pre-layout optimal PDN design and its post-layout verification
|
Chakraborty, Moumita
|
|
2019
|
65 |
C |
p. 158-168
|
artikel
|
| 2 |
An area- and energy-efficient hybrid architecture for floating-point FFT computations
|
Wang, Mingyu
|
|
2019
|
65 |
C |
p. 14-22
|
artikel
|
| 3 |
A novel approach to improve multimedia security utilizing 3D mixed chaotic map
|
Naseer, Yasir
|
|
2019
|
65 |
C |
p. 1-6
|
artikel
|
| 4 |
A novel parallel duty cycle control algorithm for photovoltaic voltage regulator system using FPGA
|
Prathap, Joseph Anthony
|
|
2019
|
65 |
C |
p. 107-120
|
artikel
|
| 5 |
A smart protocol-level task mapping for energy efficient traffic on network-on-chip
|
Wang, Jihe
|
|
2019
|
65 |
C |
p. 69-78
|
artikel
|
| 6 |
A system on chip for melanoma detection using FPGA-based SVM classifier
|
Afifi, Shereen
|
|
2019
|
65 |
C |
p. 57-68
|
artikel
|
| 7 |
A system on programmable chip design of a digitizer with improved trapezoidal filter validation
|
Bjerge, Kim
|
|
2019
|
65 |
C |
p. 7-13
|
artikel
|
| 8 |
CubeDMA – Optimizing three-dimensional DMA transfers for hyperspectral imaging applications
|
Fjeldtvedt, Johan
|
|
2019
|
65 |
C |
p. 23-36
|
artikel
|
| 9 |
Design and performance analysis of reconfigurable modified Vedic multiplier with 3-1-1-2 compressor
|
Sivanandam, K.
|
|
2019
|
65 |
C |
p. 97-106
|
artikel
|
| 10 |
Design space exploration of heterogeneous MPSoCs with variable number of hardware accelerators
|
Xu, Siyuan
|
|
2019
|
65 |
C |
p. 169-179
|
artikel
|
| 11 |
Editorial Board
|
|
|
2019
|
65 |
C |
p. ii
|
artikel
|
| 12 |
FPGA-based implementation of bistable function blocks defined in the IEC 61131
|
Chmiel, M.
|
|
2019
|
65 |
C |
p. 37-46
|
artikel
|
| 13 |
Modular and parallel VLSI architecture of multi-dimensional quad-core GA co-processor for real time image/video processing
|
Chakraborty, Anirban
|
|
2019
|
65 |
C |
p. 180-195
|
artikel
|
| 14 |
Optimized hardware accelerators for data mining applications on embedded platforms: Case study principal component analysis
|
Shahrouzi, S. Navid
|
|
2019
|
65 |
C |
p. 79-96
|
artikel
|
| 15 |
Real-time architecture for channel estimation and equalization in broadband PLC
|
Nombela, Francisco
|
|
2019
|
65 |
C |
p. 121-135
|
artikel
|
| 16 |
Reconfigurable address generator for multi-standard interleaver
|
Sathees Babu, Geethu
|
|
2019
|
65 |
C |
p. 47-56
|
artikel
|
| 17 |
SIMD stealing: Architectural support for efficient data parallel execution on multicores
|
Huang, Libo
|
|
2019
|
65 |
C |
p. 136-147
|
artikel
|
| 18 |
Towards design and automation of a scalable split-radix FFT processor for high throughput applications
|
Rauf, Adnan
|
|
2019
|
65 |
C |
p. 148-157
|
artikel
|
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