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29 results found

no	title	author	magazine	year	volume	issue	page(s)	type
1	Acceleration of brain cancer detection algorithms during surgery procedures using GPUs	Torti, E.		2018	61	C	p. 171-178	article
2	A comparative analysis of VLSI trusted virtual sensors	Martínez-Rodríguez, Macarena C.		2018	61	C	p. 108-116	article
3	Active flow control using dense wireless sensor and actuator networks	Sámano, Ramiro		2018	61	C	p. 279-295	article
4	A low-cost synthesizable RISC-V dual-issue processor core leveraging the compressed Instruction Set Extension	Patsidis, Karyofyllis		2018	61	C	p. 1-10	article
5	An architecture for online-diagnosis systems supporting compressed communication	Jo, Seungbum		2018	61	C	p. 242-256	article
6	A new design and implementation of hardware accelerator for line detection	Chen, Ching-Han		2018	61	C	p. 179-197	article
7	A novel rising Edge Triggered Resettable D flip-flop using five input majority gate	Zoka, Saeid		2018	61	C	p. 327-335	article
8	A portable embedded system for point-to-point secure signals transmission	Jiménez, M.		2018	61	C	p. 126-134	article
9	Application-aware Multi-Objective Routing based on Genetic Algorithm for 2D Network-on-Chip	Benmessaoud Gabis, A.		2018	61	C	p. 135-153	article
10	A scheduling based energy-aware core switching technique to avoid thermal threshold values in multi-core processing systems	Bashir, Qaisar		2018	61	C	p. 296-305	article
11	A survey of Open-Source UAV flight controllers and flight simulators	Ebeid, Emad		2018	61	C	p. 11-20	article
12	Compact FPGA architectures for the two-band fast discrete Hartley transform	Pyrgas, Lampros		2018	61	C	p. 117-125	article
13	Design of Multi Cipher Processing Architecture for Random Cross Access	Li, Li		2018	61	C	p. 336-343	article
14	Editorial Board			2018	61	C	p. ii	article
15	Enhanced architecture for programmable logic controllers targeting performance improvements	Tasca, Laurence Crestani		2018	61	C	p. 306-315	article
16	Exploring manycore architectures for next-generation HPC systems through the MANGO approach	Flich, José		2018	61	C	p. 154-170	article
17	FBNoC: FPGA-based network on chip emulator for full-system architectural simulation of many-core systems	Ahmed, Gamil A.		2018	61	C	p. 72-85	article
18	High speed and efficient area optimal ate pairing processor implementation over BN and BLS12 curves on FPGA	Sghaier, Anissa		2018	61	C	p. 227-241	article
19	High-throughput bit processor for cryptography, error correction, and error detection	Huo, Yuanhong		2018	61	C	p. 207-216	article
20	Improving the area of fast parallel decimal multipliers	Véstias, Mário		2018	61	C	p. 96-107	article
21	Next generation of Exascale-class systems: ExaNeSt project and the status of its interconnect and storage development	Katevenis, Manolis		2018	61	C	p. 58-71	article
22	ONChip peripherals are ON for chaos – an image fused encryption	Rajagopalan, Sundararaman		2018	61	C	p. 257-278	article
23	Real parallel and constant delay logic circuit design methodology based on the DNA model-of-computation	Beiki, Z.		2018	61	C	p. 217-226	article
24	Real-time HDTV to 4K and 8K-UHD conversions using anti-aliasing based super resolution algorithm on FPGA	Ambalathankandy, Prasoon		2018	61	C	p. 21-31	article
25	ROLFER: A fully autonomous aerial rescue support system	Lygouras, Eleftherios		2018	61	C	p. 32-42	article
26	S-box-based random number generation for stochastic computing	Neugebauer, Florian		2018	61	C	p. 316-326	article
27	The MegaM@Rt2 ECSEL project: MegaModelling at Runtime – Scalable model-based framework for continuous development and runtime validation of complex systems	Afzal, Wasif		2018	61	C	p. 86-95	article
28	Using dynamic partial reconfiguration of FPGAs in real-Time systems	Pezzarossa, Luca		2018	61	C	p. 198-206	article
29	ZATPG: SAT-based test patterns generator with zero-aliasing in temporal compaction	Hülle, Robert		2018	61	C	p. 43-57	article

29 results found

Koninklijke Bibliotheek - National Library of the Netherlands