| nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
| 1 |
A comprehensive set of schemes for PUF response generation
|
Habib, Bilal
|
|
2017
|
51 |
C |
p. 239-251
13 p.
|
artikel
|
| 2 |
Adaptive voltage scaling in a heterogeneous FPGA device with memory and logic in-situ detectors
|
Nunez-Yanez, Jose
|
|
2017
|
51 |
C |
p. 227-238
12 p.
|
artikel
|
| 3 |
An approach to classification and under-sampling of the interfering wireless signals
|
Draganić, Andjela
|
|
2017
|
51 |
C |
p. 106-113
8 p.
|
artikel
|
| 4 |
A novel power efficient 0.64-GFlops fused 32-bit reversible floating point arithmetic unit architecture for digital signal processing applications
|
AnanthaLakshmi, A.V.
|
|
2017
|
51 |
C |
p. 366-385
20 p.
|
artikel
|
| 5 |
Automatic instruction-set architecture synthesis for VLIW processor cores in the ASAM project
|
Jordans, Roel
|
|
2017
|
51 |
C |
p. 114-133
20 p.
|
artikel
|
| 6 |
AxleDB: A novel programmable query processing platform on FPGA
|
Salami, Behzad
|
|
2017
|
51 |
C |
p. 142-164
23 p.
|
artikel
|
| 7 |
Bio-inspired self-aware fault-tolerant routing protocol for network-on-chip architectures using Particle Swarm Optimization
|
Abba, Sani
|
|
2017
|
51 |
C |
p. 18-38
21 p.
|
artikel
|
| 8 |
Combining hardware and software codecs to enhance data channels in FPGA streaming systems
|
Wijeyasinghe, Marlon
|
|
2017
|
51 |
C |
p. 275-288
14 p.
|
artikel
|
| 9 |
CONTREX: Design of embedded mixed-criticality CONTRol systems under consideration of EXtra-functional properties
|
Grüttner, Kim
|
|
2017
|
51 |
C |
p. 39-55
17 p.
|
artikel
|
| 10 |
Criteria for Solar Car Optimized Route Estimation
|
Hasicic, Mehrija
|
|
2017
|
51 |
C |
p. 289-296
8 p.
|
artikel
|
| 11 |
Editorial Board
|
|
|
2017
|
51 |
C |
p. iii-
1 p.
|
artikel
|
| 12 |
Efficient dynamic priority based soft error mitigation techniques for configuration memory of FPGA hardware
|
Mandal, Swagata
|
|
2017
|
51 |
C |
p. 313-330
18 p.
|
artikel
|
| 13 |
Efficient integration of coprocessor in LEON3 processor pipeline for System-on-Chip design
|
Bansal, Rajul
|
|
2017
|
51 |
C |
p. 56-75
20 p.
|
artikel
|
| 14 |
Elastic superposition task mapping for NoC-based reconfigurable systems
|
Huang, Chun-Hsian
|
|
2017
|
51 |
C |
p. 297-312
16 p.
|
artikel
|
| 15 |
Embedded context aware diagnosis for a UAV SoC platform
|
Zermani, Sara
|
|
2017
|
51 |
C |
p. 185-197
13 p.
|
artikel
|
| 16 |
Experimental evaluation and comparison of two recent Network-on-Chip routers for FPGAs
|
Manokaran, Jenita Priya Rajamanickam
|
|
2017
|
51 |
C |
p. 134-141
8 p.
|
artikel
|
| 17 |
Exploring redundancy granularities to repair real-time FPGA-based systems
|
Pereira-Santos, Leonardo
|
|
2017
|
51 |
C |
p. 264-274
11 p.
|
artikel
|
| 18 |
Floating accumulator architecture
|
Hwang, Yuan-Shin
|
|
2017
|
51 |
C |
p. 8-17
10 p.
|
artikel
|
| 19 |
FPGA implementation of wavelet coherence for EEG and ERP signals
|
Qassim, Yahya T.
|
|
2017
|
51 |
C |
p. 356-365
10 p.
|
artikel
|
| 20 |
High performance hardware support for elliptic curve cryptography over general prime field
|
Javeed, Khalid
|
|
2017
|
51 |
C |
p. 331-342
12 p.
|
artikel
|
| 21 |
Influence of passive hardware redundancy on differential power analysis resistance of AES cipher implemented in FPGA
|
Miškovský, Vojtěch
|
|
2017
|
51 |
C |
p. 220-226
7 p.
|
artikel
|
| 22 |
Localization of moving edge with sub-pixel accuracy in 1-D images and its FPGA implementation
|
Hagara, Miroslav
|
|
2017
|
51 |
C |
p. 1-7
7 p.
|
artikel
|
| 23 |
Luminous tiles: A new building device for smart architectures and applications
|
Facchinetti, Tullio
|
|
2017
|
51 |
C |
p. 198-208
11 p.
|
artikel
|
| 24 |
Minimizing the system impact of router faults by means of reconfiguration and adaptive routing
|
Wang, Junshi
|
|
2017
|
51 |
C |
p. 252-263
12 p.
|
artikel
|
| 25 |
Onboard FPGA-based fast estimation of point object coordinates for linear IR-sensor
|
Bekhtin, Yury S.
|
|
2017
|
51 |
C |
p. 99-105
7 p.
|
artikel
|
| 26 |
Optimization-based power and thermal management for dark silicon aware 3D chip multiprocessors using heterogeneous cache hierarchy
|
Asad, Arghavan
|
|
2017
|
51 |
C |
p. 76-98
23 p.
|
artikel
|
| 27 |
RACMan: Replication-aware cache management for manycore CMPs with private LLCs
|
Yuan, Fengkai
|
|
2017
|
51 |
C |
p. 165-175
11 p.
|
artikel
|
| 28 |
Radix-8 full adder in QCA with single clock-zone carry propagation delay
|
SangSefidi, Milad
|
|
2017
|
51 |
C |
p. 176-184
9 p.
|
artikel
|
| 29 |
Soft error susceptibility analysis methodology of HLS designs in SRAM-based FPGAs
|
Tonfat, Jorge
|
|
2017
|
51 |
C |
p. 209-219
11 p.
|
artikel
|
| 30 |
Using graph isomorphism for mapping of data flow applications on reconfigurable computing systems
|
Mishra, Ashish
|
|
2017
|
51 |
C |
p. 343-355
13 p.
|
artikel
|
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