| nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
| 1 |
A common gate LNA with negative resistance for noise reduction
|
Shokrekhodaei, Maryamsadat
|
|
|
82 |
C |
p. 5-12
|
artikel
|
| 2 |
An energy-efficient DAC switching algorithm based on charge recycling method for SAR ADCs
|
Akbari, Meysam
|
|
|
82 |
C |
p. 29-35
|
artikel
|
| 3 |
A novel three-section encoder in a low-power 2.3 GS/s flash ADC
|
Damghanian, Masumeh
|
|
|
82 |
C |
p. 71-80
|
artikel
|
| 4 |
A power scalable 2–10 Gb/s PI-based clock data recovery for multilane applications
|
Lv, Fangxu
|
|
|
82 |
C |
p. 36-45
|
artikel
|
| 5 |
Design of MTJ-Based nonvolatile logic gates for quantized neural networks
|
Natsui, Masanori
|
|
|
82 |
C |
p. 13-21
|
artikel
|
| 6 |
Editorial Board
|
|
|
|
82 |
C |
p. ii
|
artikel
|
| 7 |
Fully graph solution of the sensitivity of switched circuits
|
Brtník, Bohumil
|
|
|
82 |
C |
p. 1-4
|
artikel
|
| 8 |
5-Gb/s linear re-driver in 180 nm CMOS technology
|
Nguyen, Hieu
|
|
|
82 |
C |
p. 81-91
|
artikel
|
| 9 |
Hysteresis nonlinearity modeling and linearization approach for Envelope Tracking Power Amplifiers in wireless systems
|
Al-kanan, Haider
|
|
|
82 |
C |
p. 101-107
|
artikel
|
| 10 |
MTJ-based asynchronous circuits for Re-initialization free computing against power failures
|
Onizawa, N.
|
|
|
82 |
C |
p. 46-61
|
artikel
|
| 11 |
Power and area-efficient design of VCMA-MRAM based full-adder using approximate computing for IoT applications
|
Zarei, Ali
|
|
|
82 |
C |
p. 62-70
|
artikel
|
| 12 |
Proactive correction coset decoding scheme based on SEC-DED code for multibit asymmetric errors in STT-MRAM
|
Liu, Liwen
|
|
|
82 |
C |
p. 92-100
|
artikel
|
| 13 |
Realization and characterization of carbon black based fractional order element
|
Biswas, K.
|
|
|
82 |
C |
p. 22-28
|
artikel
|
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