nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
1 |
A 10-bit 1 MS/s segmented Dual-Sampling SAR ADC with reduced switching energy
|
Rikan, Behnam Samadpoor |
|
|
70 |
C |
p. 89-96 |
artikel |
2 |
A current-reuse dual-channel bio-signal amplifier for WBAN nodes
|
Liu, Lianxi |
|
|
70 |
C |
p. 52-62 |
artikel |
3 |
A frequency multiplier using three ambipolar graphene transistors
|
Kabir, Hussain Mohammed Dipu |
|
|
70 |
C |
p. 12-15 |
artikel |
4 |
A fully integrated CMOS power amplifier with discrete gain control for efficiency enhancement
|
dos Santos, Edson Leonardo |
|
|
70 |
C |
p. 34-42 |
artikel |
5 |
A 0.1–5.0 GHz SDR transmitter with current-mode power-mixer and self-calibration scheme in 65 nm CMOS
|
Yin, Yun |
|
|
70 |
C |
p. 1-11 |
artikel |
6 |
A 12–27 GHz SiGe BiCMOS VGA with phase shift variation compensation
|
Li, Zhenrong |
|
|
70 |
C |
p. 97-106 |
artikel |
7 |
A high-efficient and fast-transient buck-boost converter using adaptive direct path skipping and on-duty modulation
|
Jung, Young-Ho |
|
|
70 |
C |
p. 43-51 |
artikel |
8 |
An all-digital delay-locked loop for 3-D ICs die-to-die clock deskew applications
|
Chung, Ching-Che |
|
|
70 |
C |
p. 63-71 |
artikel |
9 |
Analysis and design of a highly linear CMOS OTA for portable biomedical applications in 90 nm CMOS
|
Elamien, Mohamed B. |
|
|
70 |
C |
p. 72-80 |
artikel |
10 |
Analysis and optimal distribution scheme for SAR-VCO ADCs
|
Ding, Ruixue |
|
|
70 |
C |
p. 81-88 |
artikel |
11 |
A readout circuit with cell output slew rate compensation for 5T single-ended 28 nm CMOS SRAM
|
Wang, Deng-Shian |
|
|
70 |
C |
p. 107-116 |
artikel |
12 |
Editorial board
|
|
|
|
70 |
C |
p. i |
artikel |
13 |
Sense amplifier comparator with offset correction for decision feedback equalization based receivers
|
Kadayinti, Naveen |
|
|
70 |
C |
p. 27-33 |
artikel |
14 |
System level fault-tolerance core mapping and FPGA-based verification of NoC
|
Becchu, Naresh Kumar Reddy |
|
|
70 |
C |
p. 16-26 |
artikel |