no |
title |
author |
magazine |
year |
volume |
issue |
page(s) |
type |
1 |
A CMOS vector lock-in amplifier for sensor applications
|
Azzolini, Cristiano |
|
|
41 |
8 |
p. 449-457 |
article |
2 |
A dual mode UHF EPC Gen 2 RFID tag in 0.18μm CMOS
|
Najafi, Vali |
|
|
41 |
8 |
p. 458-464 |
article |
3 |
An efficient architecture for accumulator-based test generation of SIC pairs
|
Voyiatzis, I. |
|
|
41 |
8 |
p. 487-493 |
article |
4 |
An 863–870MHz spread-spectrum FSK transceiver design for wireless sensor
|
Trabelsi, Hatem |
|
|
41 |
8 |
p. 465-473 |
article |
5 |
Crosstalk pulsewidth calculation
|
Lorival, Jean-Etienne |
|
|
41 |
8 |
p. 474-479 |
article |
6 |
Editorial
|
Masmoudi and, Mohamed |
|
|
41 |
8 |
p. 447-448 |
article |
7 |
Editorial board
|
|
|
|
41 |
8 |
p. i |
article |
8 |
Generalized admittance matrix models of OTRAs and COAs
|
Sánchez-López, C. |
|
|
41 |
8 |
p. 502-505 |
article |
9 |
Integrated linear giga-ohm resistance using current scaling
|
Rieger, Robert |
|
|
41 |
8 |
p. 532-537 |
article |
10 |
Post-linearization with image rejection for high IIP3 and image-rejection ratio of a 17GHz CMOS low noise amplifier
|
Chiou, Hwann-Kaeo |
|
|
41 |
8 |
p. 494-501 |
article |
11 |
PowerAntz: Ant behavior inspired power budget distribution scheme for Network-on-Chip systems
|
Mandal, Suman Kalyan |
|
|
41 |
8 |
p. 523-531 |
article |
12 |
Soft error modeling and remediation techniques in ASIC designs
|
Asadi, Hossein |
|
|
41 |
8 |
p. 506-522 |
article |
13 |
Spatio-temporal coding to improve speed and noise tolerance of on-chip interconnect
|
Pillement, Sébastien |
|
|
41 |
8 |
p. 480-486 |
article |