| nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
| 1 |
A high-performance VHDL-based virtual tester: a concept and a solution
|
Krampl, Gunter
|
|
|
33 |
10 |
p. 855-859
|
artikel
|
| 2 |
Analog built-in saw-tooth generator for ADC histogram test
|
Azaı̈s, F
|
|
|
33 |
10 |
p. 781-789
|
artikel
|
| 3 |
Application of DfT techniques to a 20GHz superconductor delta ADC
|
Joseph, Arun A
|
|
|
33 |
10 |
p. 791-798
|
artikel
|
| 4 |
Dynamic noise model and its application to high speed circuit design
|
Choi, Seung Hoon
|
|
|
33 |
10 |
p. 835-846
|
artikel
|
| 5 |
Editorial
|
Osseiran, Adam
|
|
|
33 |
10 |
p. 771-772
|
artikel
|
| 6 |
Embedded servo loop for ADC linearity testing
|
Zhao, Zhurang
|
|
|
33 |
10 |
p. 773-780
|
artikel
|
| 7 |
Generation of component level fault models for MEMS
|
Rosing, R.
|
|
|
33 |
10 |
p. 861-868
|
artikel
|
| 8 |
IFC-editorial board
|
|
|
|
33 |
10 |
p. i
|
artikel
|
| 9 |
Multi-level hierarchical analogue fault simulation
|
Straube, Bernd
|
|
|
33 |
10 |
p. 815-821
|
artikel
|
| 10 |
Oscillation-based test in oversampled ΣΔ modulators
|
Huertas, Gloria
|
|
|
33 |
10 |
p. 799-806
|
artikel
|
| 11 |
Patents alert
|
|
|
|
33 |
10 |
p. 869-872
|
artikel
|
| 12 |
Synthesis method for testable electrical networks using 1st order building blocks
|
Calvano, José Vicente
|
|
|
33 |
10 |
p. 823-834
|
artikel
|
| 13 |
Testing of RF mixers with adaptive filters
|
Nácul, André
|
|
|
33 |
10 |
p. 847-853
|
artikel
|
| 14 |
Testing second-order delta–sigma modulators using pseudo-random patterns
|
Ong, C.K
|
|
|
33 |
10 |
p. 807-814
|
artikel
|
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