| nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
| 1 |
A high-level datapath synthesis method for pipelined structures
|
Arató, Péter
|
|
|
25 |
3 |
p. 237-247
|
artikel
|
| 2 |
America on display
|
McDonald, Jo Ann
|
|
|
25 |
3 |
p. xxi-xxv
|
artikel
|
| 3 |
An asynchronous model for high-level synthesis
|
Brage, Jens P.
|
|
|
25 |
3 |
p. 199-213
|
artikel
|
| 4 |
An introduction to GaAs IC design
|
Harris, M.S.
|
|
|
25 |
3 |
p. 249-250
|
artikel
|
| 5 |
A pipelined subranging analogue-to-digital video convertor with time-interleaved sampling
|
Pratas, José
|
|
|
25 |
3 |
p. 183-198
|
artikel
|
| 6 |
Coefficient-dependent logic synthesis of FIR digital filters
|
Fehér, Béla
|
|
|
25 |
3 |
p. 229-235
|
artikel
|
| 7 |
Concatenated LFSR makes a weighted built-in logic block observation
|
Martínez, Mar
|
|
|
25 |
3 |
p. 219-228
|
artikel
|
| 8 |
Design implications of SM component handling
|
Gurnett, Keith
|
|
|
25 |
3 |
p. xv-xx
|
artikel
|
| 9 |
Electronic circuit cards and surface mount technology: a guide to their design, assembly and application
|
Hurst, S.L.
|
|
|
25 |
3 |
p. 250
|
artikel
|
| 10 |
Embedding large finite state machines into programmable devices
|
Dudziak, H.
|
|
|
25 |
3 |
p. 171-182
|
artikel
|
| 11 |
1993 IEEE International Electron Device Meeting (IEDM). Washington, DC, USA
|
Szweda, Roy
|
|
|
25 |
3 |
p. i-iv
|
artikel
|
| 12 |
Introduction to semiconductor device yield modeling
|
Dimitrijev, S.
|
|
|
25 |
3 |
p. 249
|
artikel
|
| 13 |
Layout minimization of CMOS cells
|
Jones, P.L.
|
|
|
25 |
3 |
p. 250
|
artikel
|
| 14 |
Microelectronics in Europe
|
Hurst, S.L.
|
|
|
25 |
3 |
p. xxvi
|
artikel
|
| 15 |
Micromachining and ASIC technology
|
Stoffel, Axel M.
|
|
|
25 |
3 |
p. 145-156
|
artikel
|
| 16 |
News update
|
|
|
|
25 |
3 |
p. v-x
|
artikel
|
| 17 |
Physical properties of III–V semiconductor compounds, InP, InAs, GaAs, GaP, InGaAs and InGaAsP
|
Morant, M.J.
|
|
|
25 |
3 |
p. 252
|
artikel
|
| 18 |
Properties of aluminium gallium arsenide
|
Harrold, S.J.
|
|
|
25 |
3 |
p. 252
|
artikel
|
| 19 |
Simulation of semiconductor devices and processes, vol. 5
|
Mijalkovic, S.
|
|
|
25 |
3 |
p. 251-252
|
artikel
|
| 20 |
Technology CAD systems
|
Mijalković, S.
|
|
|
25 |
3 |
p. 250-251
|
artikel
|
| 21 |
Thermal monitoring of microelectronic structures
|
Székely, Vladimir
|
|
|
25 |
3 |
p. 157-170
|
artikel
|
| 22 |
Using ORCAD schematic entry for generating VHDL structural descriptions
|
Agotai, I.
|
|
|
25 |
3 |
p. 215-218
|
artikel
|
| 23 |
Vitesse ASICs in New Teradyne Test System
|
|
|
|
25 |
3 |
p. xi-xiv
|
artikel
|
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