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                             23 gevonden resultaten
nr titel auteur tijdschrift jaar jaarg. afl. pagina('s) type
1 Analog and analog-digital arrays blossom
21 4 p. 63
artikel
2 A new method for the analysis and design of canonical switched capacitor circuits Gupta, M.

21 4 p. 9-20
artikel
3 A 20-ps Si bipolar IC using advanced super self-aligned process technology with collector ion implantation
21 4 p. 64
artikel
4 A three-layer channel routing algorithm in the HVH model
21 4 p. 61
artikel
5 BIT and bipolar VLSI
21 4 p. 64
artikel
6 BLADES: an artificial intelligence approach to analog circuit design
21 4 p. 62
artikel
7 Characterization of gaas wafers etched in the NH4OH/H2O2/H2O system Choudhury, Debabani

21 4 p. 55-59
artikel
8 Design and optimization of site-by-site alignment marks for a single polysilicon bipolar process
21 4 p. 64
artikel
9 Editorial
21 4 p. 4
artikel
10 Electrical characterization of matched impedance, cofired, high-speed, microelectronic packages made from low dielectric constant, boron-doped, sol-gel silica
21 4 p. 61
artikel
11 Electron beam exposure of diazoquinone based resists Kraeuter, Wolfgang A.

21 4 p. 47-53
artikel
12 EPAS: a generic expert system for advising emitter piloting in IC manufacturing
21 4 p. 64
artikel
13 HARP: FORTRAN to silicon [ compilation system ]
21 4 p. 62
artikel
14 I Gbit/s, 32×32 high-speed space-division switching module for broadband ISDN using SST LSIs
21 4 p. 64
artikel
15 Layer assignment for VLSI interconnect delay minimization
21 4 p. 62-63
artikel
16 Mixed analog-digital ASICs
21 4 p. 63
artikel
17 Modeling complex devices gets easier
21 4 p. 63
artikel
18 Movie — an interactive environment for silicon compilation tools
21 4 p. 62
artikel
19 Novel high-order high-pass real-rclike mos ladder filters Wang, Zhenhua

21 4 p. 5-8
artikel
20 On the importance, realisation, experimental verification and measurements of active-R and active-C filters Kumar, Umesh

21 4 p. 21-45
artikel
21 Standard defined tests of complex systems. 2. The advantages of a hierarchical test
21 4 p. 63
artikel
22 The global optimization extraction of parameter for IC bipolar model
21 4 p. 63-64
artikel
23 Time-efficient VLSI artwork analysis algorithms in GOALIE2
21 4 p. 61-62
artikel
                             23 gevonden resultaten
 
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