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33 results found

no	title	author	magazine	year	volume	issue	page(s)	type
1	A comparison of CMOS circuit techniques: differential cascode voltage switch logic versus conventional logic				19	1	p. 53	article
2	A content addressable memory with a fault-tolerance mechanism				19	1	p. 54	article
3	A design of four-valued logic circuits using M-AND, M-OR, NOT operations				19	1	p. 53	article
4	Adjustment of threshold voltage of MOS devices by ion implantation	Virdi, G.S.			19	1	p. 19-33	article
5	A double-word-line structure in bipolar ECL random access memory				19	1	p. 54	article
6	Advanced development tools automate PLD design				19	1	p. 53	article
7	A fast 32 K×8 CMOS static RAM with address transition detection				19	1	p. 54	article
8	A high-speed 1 Kbit high electron-mobility transistor static RAM				19	1	p. 54	article
9	A 130K-gate CMOS mainframe chip set				19	1	p. 55	article
10	A latch-up-free CMOS RAM cell with well-source structure				19	1	p. 54	article
11	A modular design and test approach for a family of VLSI MPUs				19	1	p. 55	article
12	A planar p-n junction with near ideal breakdown voltage	Jog, Sujata			19	1	p. 41-47	article
13	A processor chip set on a 60K master image chip				19	1	p. 55	article
14	A simplified algorithm for testing microprocessors				19	1	p. 52	article
15	A simulation model of the composite “pinch resistor” device structure on linear bipolar semicustom integrated circuits	Current, K.W.			19	1	p. 4-18	article
16	A systolic array for cycle-by-rows Jacobi algorithms				19	1	p. 53	article
17	A technique for the design of systolic arrays with bit-level pipelining				19	1	p. 52	article
18	Classified index to articles-vol. 18 1987				19	1	p. 63-64	article
19	CMOS building blocks shrink and speed up FET systems				19	1	p. 52	article
20	Editorial	Butcher, John			19	1	p. 3	article
21	Editorial Board				19	1	p. CO2	article
22	Forthcoming events				19	1	p. 60-62	article
23	Harvard architecture pushes microcontroller IC into high-speed realm				19	1	p. 55	article
24	On a certain approach to the hardware implementation of the division operation				19	1	p. 52-53	article
25	On the analysis and design of CMOS-bipolar SRAMs				19	1	p. 54	article
26	Parliamentary report				19	1	p. 56-57	article
27	Research and Development				19	1	p. 58-59	article
28	SEM study of thermal degradation of indium phosphide substrates	Shrivastava, M.C.			19	1	p. 48-51	article
29	Signature analysis of testing in last standard-cell ASICs				19	1	p. 53	article
30	Study of a new-type I2L circuit				19	1	p. 53	article
31	The architecture of a capability-based micropocessor system				19	1	p. 55	article
32	The kinetics of thin film resistor stabilisation	Goldberg, I.A.			19	1	p. 34-40	article
33	The super Z80 microprocessor-the Hitachi HD 64180				19	1	p. 55	article

33 results found

Koninklijke Bibliotheek - National Library of the Netherlands