nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
1 |
A 12 bit 250 MS/s SAR ADC using level shifted pseudo bottom plates sampling for high conversion rate and wide input amplitude
|
Zhao, Chao |
|
|
157 |
C |
p. |
artikel |
2 |
A calibration scheme for SAR ADCs based on capacitor weight optimization using an improved simulated annealing algorithm
|
Wang, Zhuofan |
|
|
157 |
C |
p. |
artikel |
3 |
A chaotic strong transition effect ring oscillator PUF with effective immunity to modeling attacks
|
Bian, Jingchang |
|
|
157 |
C |
p. |
artikel |
4 |
A deep oxide trench SOI-LIGBT with self-driving PMOS for improved reliability
|
Chen, Weizhong |
|
|
157 |
C |
p. |
artikel |
5 |
A 10 Gb/s PAM4 receiver with reference-less half-rate Bang-Bang CDR in 180-nm CMOS
|
Liu, Jiaxin |
|
|
157 |
C |
p. |
artikel |
6 |
A 7–9 GHz fast-startup low phase noise CMOS LC VCO using G m -boosted technique and circuit asymmetries for multi-mode radar transmitter
|
Tan, Tao |
|
|
157 |
C |
p. |
artikel |
7 |
An 85.6-dB SNDR 1.5 MHz-BW NS-pipelined SAR ADC employing the gain-error-shaping technique to enhance the ADC linearity
|
Liang, Wenjie |
|
|
157 |
C |
p. |
artikel |
8 |
An 88 dB SNDR second-order CIFF delta-sigma modulator with 3-bit quantizer and capacitor sharing circuit
|
Do, Wonkyu |
|
|
157 |
C |
p. |
artikel |
9 |
An enhanced interlocked feedback structure-based dual-node upset resilient latch
|
Bai, Na |
|
|
157 |
C |
p. |
artikel |
10 |
A 0.87-ppm/°C, 3.2−40 V VIN reference voltage source with −121 dB PSRR at 100 Hz
|
Wang, Chunlai |
|
|
157 |
C |
p. |
artikel |
11 |
A quad-core wideband Colpitts VCO with 28.2 % bandwidth and −122 dBc/Hz phase noise at 1 MHz offset
|
Wu, Guoan |
|
|
157 |
C |
p. |
artikel |
12 |
Compact switchable microstrip lowpass filter using cross-shaped resonator with sextuple states
|
Wan, Xiaohan |
|
|
157 |
C |
p. |
artikel |
13 |
Design and performance optimization of a stackable Si1-xGex nanosheet gate-controlled thyristor (GCT) DRAM
|
He, Hao |
|
|
157 |
C |
p. |
artikel |
14 |
Design of high suppression filter for millimeter-wave using glass-based advanced package integrated technology
|
Qi, Yanzhu |
|
|
157 |
C |
p. |
artikel |
15 |
Design of lightweight on-chip one-dimensional convolutional neural network accelerators for edge-end chips
|
Yu, Haotian |
|
|
157 |
C |
p. |
artikel |
16 |
Editorial Board
|
|
|
|
157 |
C |
p. |
artikel |
17 |
Exact and approximate Radix-4 recoding multipliers for high-efficiency computation
|
Zhu, Xinyu |
|
|
157 |
C |
p. |
artikel |
18 |
Forward and reverse artificial neural network for performance prediction and structural design of bonding wire-based active RF circuit
|
Wu, Lei |
|
|
157 |
C |
p. |
artikel |
19 |
Implication logic synthesis and optimization methods for memristor-based logic circuits
|
Liu, Tingting |
|
|
157 |
C |
p. |
artikel |
20 |
Low-power 12T TFET-MOSFET hybrid SRAM bitcell and hybrid 8T SRAM array based on multiplexing strategy
|
Hu, Wei |
|
|
157 |
C |
p. |
artikel |
21 |
Narrowband ladder-type MEMS filter based on high- Q thin-film piezoelectric-on-silicon MEMS resonators
|
Zhu, Kewen |
|
|
157 |
C |
p. |
artikel |
22 |
Simulation study of inversion, accumulation, and junctionless mode monolayer MoS2/Ge heterojunction nanosheet at 1.5 nm node
|
Guo, Xia |
|
|
157 |
C |
p. |
artikel |
23 |
Study of GaN Schottky barrier IMPATT diodes with a self-aligned field plate for terahertz applications
|
Huang, Xuan |
|
|
157 |
C |
p. |
artikel |
24 |
Three-dimensional design of SOI LDMOS with high-k film trench and L-shaped gate
|
Hu, Yue |
|
|
157 |
C |
p. |
artikel |