nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
1 |
A 12-bit 10 MS/s SAR ADC using the extended C–2C capacitor array
|
Xu, Hui |
|
|
139 |
C |
p. |
artikel |
2 |
A 12-bit single slope ADC with multi-step structure and ramp calibration technique for image sensors
|
Li, Hao |
|
|
139 |
C |
p. |
artikel |
3 |
A capacitively coupled digital isolator with CMTI of 160 kV/μs and data rate of 230 Mbps
|
Zeng, Jingbo |
|
|
139 |
C |
p. |
artikel |
4 |
A fully-digital calibration algorithm for VCO-based ADC
|
Xing, Xinpeng |
|
|
139 |
C |
p. |
artikel |
5 |
A 25-Gb/s dual-loop adaptive continuous-time linear equalizer based on power comparison for the optical transmitter
|
Hong, Xin |
|
|
139 |
C |
p. |
artikel |
6 |
A 6–18 GHz bulk CMOS three-stage gain-compensation amplifier for phased-array radar system
|
Chen, Bofan |
|
|
139 |
C |
p. |
artikel |
7 |
A 4 GHz FLL-less fast-locking sampling PLL with gain-boosted sampling phase-frequency detector in 28 nm CMOS
|
Yang, Chao |
|
|
139 |
C |
p. |
artikel |
8 |
A 3–5 GHz, 108fs-RMS jitter, clock receiver circuit for time-interleaved ADCs with a sampling rate of 4 GS/s
|
Wu, Kejun |
|
|
139 |
C |
p. |
artikel |
9 |
A 4.5–8.5 GHz GaAs power amplifier with high in-band flatness
|
Li, Shengqi |
|
|
139 |
C |
p. |
artikel |
10 |
A low-power mm-wave reduced-noise active balun with low-phase and low-gain error using common-gate shorting and DeQ inductor technique
|
Baharvand, Zainab |
|
|
139 |
C |
p. |
artikel |
11 |
A 0.053 mm2 10-bit 10-ks/s 40-nW SAR ADC with pseudo single ended switching procedure for bio-related applications
|
Zhang, Zhong |
|
|
139 |
C |
p. |
artikel |
12 |
A monolithic light scattering particle CMOS sensor for integrated optics application
|
Yang, An |
|
|
139 |
C |
p. |
artikel |
13 |
A multichannel readout integrated circuit with column-wise pseudo differential extended counting ADCs for an uncooled infrared focal plane array based on silicon diodes
|
Zhou, Ye |
|
|
139 |
C |
p. |
artikel |
14 |
A negative capacitance FET based energy efficient 6T SRAM computing-in-memory (CiM) cell design for deep neural networks
|
Birudu, Venu |
|
|
139 |
C |
p. |
artikel |
15 |
An equivalent processing method for integrated circuit electrical parameter data using BP neural networks
|
Zhan, Wenfa |
|
|
139 |
C |
p. |
artikel |
16 |
An offset and gain error calibration method in high-precision SAR ADCs
|
Hao, Junyan |
|
|
139 |
C |
p. |
artikel |
17 |
A novel high-performance trench lateral double-diffused MOSFET with buried oxide bump layer
|
Jia, Hujun |
|
|
139 |
C |
p. |
artikel |
18 |
A novel inverted T-shaped negative capacitance TFET for label-free biosensing application
|
Luo, Di |
|
|
139 |
C |
p. |
artikel |
19 |
A peak-current mode boost converter with fast linear transient response
|
Cao, Jing |
|
|
139 |
C |
p. |
artikel |
20 |
A 0.26 μ Vrms instrumentation amplifier based on discrete-time DC servo loop with successive-approximation-compensation technique and Chopper DAC Array
|
Wang, Tingyu |
|
|
139 |
C |
p. |
artikel |
21 |
Design and analysis of novel bilateral tunnelling based tunnel FET considering workfunction engineered metal strip for enhanced performance
|
Kwatra, Priyanka |
|
|
139 |
C |
p. |
artikel |
22 |
Design and optimization of GaAs-based thin film integrated passive device bandpass filters for 5G communications
|
Li, Ji-Hu |
|
|
139 |
C |
p. |
artikel |
23 |
Design of dual-mode resonators based on laterally coupled alternating thickness (LCAT) modes for WiFi 2.4G and n77 dual-passband filter
|
Zhao, Jicong |
|
|
139 |
C |
p. |
artikel |
24 |
Design optimization of junctionless bottom spacer tapered FinFET: Device to circuit level implementation
|
Bhukya, Sunitha |
|
|
139 |
C |
p. |
artikel |
25 |
Differential high gain transimpedance amplifier with –3dB-bandwidth extension
|
Hosseini, Arash |
|
|
139 |
C |
p. |
artikel |
26 |
Dynamic self-test scheme and authentication protocol for improving robustness of strong PUF
|
Li, Yan |
|
|
139 |
C |
p. |
artikel |
27 |
Editorial Board
|
|
|
|
139 |
C |
p. |
artikel |
28 |
Effect of curie temperature on electrical parameters of NC-FinFET and digital switching application of NC-FinFET
|
Maurya, Ravindra Kumar |
|
|
139 |
C |
p. |
artikel |
29 |
Effects of physical parameters of graded AlGaN buffer on DC characteristic and short-channel effects in AlInN/GaN high-electron mobility transistors
|
Han, Tiecheng |
|
|
139 |
C |
p. |
artikel |
30 |
Fully integrated multi-level non-overlapping clock phase generator for pipelined ADCs in SiGe BiCMOS 0.13 μm
|
Çetinkaya, Hakan |
|
|
139 |
C |
p. |
artikel |
31 |
Impact of gate-level clustering on automated system partitioning of 3D-ICs
|
Delhaye, Quentin |
|
|
139 |
C |
p. |
artikel |
32 |
Investigation of Analog/RF and linearity performance with self-heating effect in nanosheet FET
|
Rathore, Sunil |
|
|
139 |
C |
p. |
artikel |
33 |
Junctionless-accumulation-mode stacked gate GAA FinFET with dual-k spacer for reliable RFIC design
|
Kumar, Bhavya |
|
|
139 |
C |
p. |
artikel |
34 |
Leakage power attack resilient Schmitt trigger based 12T symmetric SRAM cell
|
Naz, Syed Farah |
|
|
139 |
C |
p. |
artikel |
35 |
Machine learning based prediction model for single event burnout hardening design of power MOSFETs
|
Liao, Xinfang |
|
|
139 |
C |
p. |
artikel |
36 |
Modeling and simulation of an insulated-gate HEMT using p-SnO2 gate for high VTH design
|
Yi, Bo |
|
|
139 |
C |
p. |
artikel |
37 |
Modeling of Dual- Metal Junctionless Accumulation-Mode cylindrical surrounding gate (DM-JAM-CSG) MOSFET for cryogenic temperature applications
|
Gupta, Sumedha |
|
|
139 |
C |
p. |
artikel |
38 |
Modeling threshold voltage and drain-induced barrier lowering effect of opposite doping core–shell channel surrounding-gate junctionless MOSFET
|
Xu, Lijun |
|
|
139 |
C |
p. |
artikel |
39 |
Power efficient designs of CNTFET-based ternary SRAM
|
Gadgil, Sharvani |
|
|
139 |
C |
p. |
artikel |
40 |
Profiling side-channel attacks based on CNN model fusion
|
Ni, Lei |
|
|
139 |
C |
p. |
artikel |
41 |
Programmable 1 A ultra-low dropout LDO regulator for high-resolution camera sensors
|
Buryanec, Lukas |
|
|
139 |
C |
p. |
artikel |
42 |
P-type trench gate based drain-extended N-type MOS design for high unclamped inductive switching reliability
|
Pali, Shraddha |
|
|
139 |
C |
p. |
artikel |
43 |
Revolutionizing wireless communication: A review perspective on design and optimization of RF MEMS switches
|
Percy, J. Joslin |
|
|
139 |
C |
p. |
artikel |
44 |
Simulation study of lateral CEFT logic performance at 3 nm Node
|
Wen, Guanguo |
|
|
139 |
C |
p. |
artikel |
45 |
Thermal layout optimization for 3D stacked multichip modules
|
Chen, Yanning |
|
|
139 |
C |
p. |
artikel |
46 |
Trenched diamond PN junction diode with enhanced conductance modulation effect designed by simulation
|
Li, Dongshuai |
|
|
139 |
C |
p. |
artikel |
47 |
Two sextuple cross-coupled SRAM cells with double-node-upset protection and cost optimization for aerospace applications
|
Yan, Aibin |
|
|
139 |
C |
p. |
artikel |
48 |
Ultra-low voltage start-up clock generators for micro-scale energy harvesting: New variants of body-biased stacked inverter based ring oscillators
|
Mukherjee, Ankur |
|
|
139 |
C |
p. |
artikel |