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                             21 results found
no title author magazine year volume issue page(s) type
1 An experimental approach to characterize rate-dependent failure envelopes and failure site transitions in surface mount assemblies Varghese, J.
2007
47 7 p. 1095-1102
8 p.
article
2 Characterization of parasitic residual deposition on passivation layer in electroless nickel immersion gold process Md Arshad, M.K.
2007
47 7 p. 1120-1126
7 p.
article
3 Design automation to suppress cable discharge event (CDE) induced latchup in 90nm CMOS ASICs Brennan, Ciaran J.
2007
47 7 p. 1069-1073
5 p.
article
4 Effects of device aging on microelectronics radiation response and reliability Fleetwood, D.M.
2007
47 7 p. 1075-1085
11 p.
article
5 Empirical correlation between package-level ball impact test and board-level drop reliability Yeh, Chang-Lin
2007
47 7 p. 1127-1134
8 p.
article
6 Evaluation of sweep resistance of Q Auto-Loop and Square-Loop bonds for semiconductor packaging technology Kung, Huang-Kuang
2007
47 7 p. 1103-1112
10 p.
article
7 Evolution of microstructure and failure mechanism of lead-free solder interconnections in power cycling and thermal shock tests Laurila, T.
2007
47 7 p. 1135-1144
10 p.
article
8 Experience in HBM ESD testing of high pin count devices Brodbeck, Tilo
2007
47 7 p. 1025-1029
5 p.
article
9 Guest editorial Stadler, Wolfgang
2007
47 7 p. 999-
1 p.
article
10 Implementation of diode and bipolar triggered SCRs for CDM robust ESD protection in 90nm CMOS ASICs Brennan, Ciaran J.
2007
47 7 p. 1030-1035
6 p.
article
11 Integration of an SCR in an active clamp Reynders, K.
2007
47 7 p. 1054-1059
6 p.
article
12 Measurement and analysis of contact resistance in wafer probe testing Liu, D.S.
2007
47 7 p. 1086-1094
9 p.
article
13 [No title] Stojcev, Mile
2007
47 7 p. 1153-1154
2 p.
article
14 Properties of low temperature Sn–Ag–Bi–In solder systems Kim, Keun-Soo
2007
47 7 p. 1113-1119
7 p.
article
15 RF ESD protection strategies: Codesign vs. low-C protection Soldner, W.
2007
47 7 p. 1008-1015
8 p.
article
16 SCR-based ESD protection in nanometer SOI technologies Marichal, Olivier
2007
47 7 p. 1060-1068
9 p.
article
17 SCR operation mode of diode strings for ESD protection Glaser, Ulrich
2007
47 7 p. 1044-1053
10 p.
article
18 Selecting an appropriate ESD protection for discrete RF power LDMOSTs Smedes, T.
2007
47 7 p. 1000-1007
8 p.
article
19 Spice-aided modelling of the UC3842 current mode PWM controller with selfheating taken into account Zarębski, Janusz
2007
47 7 p. 1145-1152
8 p.
article
20 Transient voltage overshoot in TLP testing – Real or artifact? Trémouilles, D.
2007
47 7 p. 1016-1024
9 p.
article
21 Verification of CDM circuit simulation using an ESD evaluation circuit Etherton, M.
2007
47 7 p. 1036-1043
8 p.
article
                             21 results found
 
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