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                             20 gevonden resultaten
nr titel auteur tijdschrift jaar jaarg. afl. pagina('s) type
1 A comprehensive model for PMOS NBTI degradation: Recent progress Alam, M.A.
2007
47 6 p. 853-862
10 p.
artikel
2 An investigation on the influence of electromagnetic interference induced in conducting wire of universal LEDs Tsai, Han-Chang
2007
47 6 p. 959-966
8 p.
artikel
3 A reliability study of the lead-free solder connections of miniature chip components on hybrid circuits Ročak, D.
2007
47 6 p. 986-995
10 p.
artikel
4 Challenges of Ta2O5 as high-k dielectric for nanoscale DRAMs Atanassova, E.
2007
47 6 p. 913-923
11 p.
artikel
5 Circuit level prediction of device performance degradation due to negative bias temperature stress Kuroda, Rihito
2007
47 6 p. 930-936
7 p.
artikel
6 Deep level defects involved in MOS device instabilities Lenahan, P.M.
2007
47 6 p. 890-898
9 p.
artikel
7 Dynamic NBTI characteristics of PMOSFETs with PE-SiN capping Lu, C.Y.
2007
47 6 p. 924-929
6 p.
artikel
8 Editorial Grasser, Tibor
2007
47 6 p. 839-840
2 p.
artikel
9 Gate leakage properties of MOS devices with tri-layer high-k gate dielectric Chen, W.B.
2007
47 6 p. 937-943
7 p.
artikel
10 Hydrogen in MOSFETs – A primary agent of reliability issues Pantelides, Sokrates T.
2007
47 6 p. 903-911
9 p.
artikel
11 Hydrogen transport in doped and undoped polycrystalline silicon Nickel, N.H.
2007
47 6 p. 899-902
4 p.
artikel
12 Iterative algorithm for automatic alignment by object transformation Kim, Hyong Tae
2007
47 6 p. 972-985
14 p.
artikel
13 NBTI product level reliability for a low-power SRAM technology Puchner, Helmut
2007
47 6 p. 873-879
7 p.
artikel
14 Negative bias temperature instabilities in HfSiO(N)-based MOSFETs: Electrical characterization and modeling Houssa, M.
2007
47 6 p. 880-889
10 p.
artikel
15 Negative bias temperature instability: What do we understand? Schroder, Dieter K.
2007
47 6 p. 841-852
12 p.
artikel
16 [No title] Stojcev, Mile
2007
47 6 p. 996-997
2 p.
artikel
17 Performance and reliability improvement of flash device by a novel programming method Ho, Chia-Huai
2007
47 6 p. 967-971
5 p.
artikel
18 Performance comparison of channel engineered deep sub-micrometer pseudo SOI n-MOSFETs Sarkar, Partha
2007
47 6 p. 953-958
6 p.
artikel
19 Probing negative bias temperature instability using a continuum numerical framework: Physics to real world operation Chakravarthi, S.
2007
47 6 p. 863-872
10 p.
artikel
20 The impacts of high tensile stress CESL and geometry design on device performance and reliability for 90nm SOI nMOSFETs Lai, Chieh-Ming
2007
47 6 p. 944-952
9 p.
artikel
                             20 gevonden resultaten
 
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