| no |
title |
author |
magazine |
year |
volume |
issue |
page(s) |
type |
| 1 |
An introduction to fast wafer level reliability monitoring for integrated circuit mass production
|
Martin, Andreas
|
|
2004
|
44 |
8 |
p. 1209-1231
23 p.
|
article
|
| 2 |
Applying the fWLR concept to Stress induced leakage current in non-volatile memory processes
|
Tao, Guoqiao
|
|
2004
|
44 |
8 |
p. 1269-1273
5 p.
|
article
|
| 3 |
Bias temperature instability assessment of n- and p-channel MOS transistors using a polysilicon resistive heated scribe lane test structure
|
Muth, Werner
|
|
2004
|
44 |
8 |
p. 1251-1262
12 p.
|
article
|
| 4 |
Digital design and computer architecture; Hassan A. Farhat. CRC Press, Boca Raton: 2004. Hardcover, 487pp, plus XXII. ISBN 0-8493-1191-8
|
Stojcev, Mile
|
|
2004
|
44 |
8 |
p. 1279-1280
2 p.
|
article
|
| 5 |
Evaluation of performance–reliability trade-offs in a Si–Ge BiCMOS process using fast wafer level techniques
|
O'Connell, Barry
|
|
2004
|
44 |
8 |
p. 1263-1268
6 p.
|
article
|
| 6 |
Fast wafer level reliability: methods and experiences
|
Vollertsen, Rolf-Peter
|
|
2004
|
44 |
8 |
p. 1207-1208
2 p.
|
article
|
| 7 |
Power Distribution Networks in High Speed Integrated Circuits; Andrey Mezhiba, Eby Friedman. Kluwer Academic Publishers, Boston; 2004. Hardcover, 280pp, plus XXIII, 129 euro. ISBN 1-4020-7534-0
|
Stojcev, Mile
|
|
2004
|
44 |
8 |
p. 1277-1278
2 p.
|
article
|
| 8 |
Quantifying charging damage in gate oxides of antenna structures for WLR monitoring
|
Smeets, David
|
|
2004
|
44 |
8 |
p. 1245-1250
6 p.
|
article
|
| 9 |
Reliability of Computer Systems and Networks: Fault Tolerance, Analysis and Design; Martin L. Shooman. John Wiley and Sons Inc., New York; 2002. Hardcover, pp. 528, plus XXII.
|
Stojcev, Mile
|
|
2004
|
44 |
8 |
p. 1275-1276
2 p.
|
article
|
| 10 |
Some practical considerations for effective and efficient wafer-level reliability control
|
Tseng, Summer F.C.
|
|
2004
|
44 |
8 |
p. 1233-1243
11 p.
|
article
|
Journal description