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Details for article 5 of 191 found articles
| Title: |
A dedicated simulation approach for the steady-state analysis of power electronic circuits |
| Author: |
F. Tourkhani P. Viarouge |
| Appeared in: |
Integrated computer-aided engineering |
| Paging: | Volume 8 (2001) nr. 3 pages 215-230 |
| Year: |
2001-08-17 |
| Contents: |
This paper describes SUPRA (Simulator for Unified Power Regulators Analysis), a new simulation tool for the behavior mode simulation of switchmode power supplies. This simulation tool uses the variable- topology simulation method (VTSM) in conjunction with the state-space based analysis techniques. The VTSM allows a systematic reduction of the dimension of the state space equations during the simulation process. In addition, it will be shown that this simulation method is dedicated to the steady-state problem of a power converter, because it provides an automatic reduction of the number of equations and variables in the steady-state equation. The use of the variable-topology simulation process for simplifying the steady-state equation of a power converter has been led to the new concept of the steady-state variables (SSV) of a switching network. The details of the simulation method, including the steady-state analysis procedure, are described. Several examples that illustrate the operation and the performance of SUPRA are given. |
| Publisher: |
IOS Press |
| Source file: |
Elektronische Wetenschappelijke Tijdschriften |
Details for article 5 of 191 found articles
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