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Details for article 9 of 20 found articles
| Title: |
Comparison of Compaction Techniques in VLSI Physical Design |
| Author: |
Chetan Sharma Shobhit Jaiswal |
| Appeared in: |
International journal of computer technology and applications |
| Paging: | Volume 02 (2011) nr. 01 pages 160-164 |
| Year: |
2011 |
| Contents: |
The rapid growth in integration technology has been made possible by the automation of various steps involved in the design and fabrication of VLSI chips. The main factors which decide the quality of any chip are power consumption, area and performance of the chip. The demand of light weighted & compact chip is increase day by day. This paper reviewed the different techniques of compaction of any chip and comparison among them because different techniques have different tradeoffs. The appropriate technique is used depending upon requirements. |
| Publisher: |
Technopark Publications (provided by DOAJ) |
| Source file: |
Elektronische Wetenschappelijke Tijdschriften |
Details for article 9 of 20 found articles
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