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                                       Details for article 12 of 23 found articles
 
 
  Hierarchical representation of on-chip context to reduce reconfiguration time and implementation area for coarse-grained reconfigurable architecture
 
 
Title: Hierarchical representation of on-chip context to reduce reconfiguration time and implementation area for coarse-grained reconfigurable architecture
Author: Wang, YanSheng
Liu, LeiBo
Yin, ShouYi
Zhu, Min
Cao, Peng
Yang, Jun
Wei, ShaoJun
Appeared in: Science China information sciences
Paging: Volume 56 (2013) nr. 11 pages 1-20
Year: 2013
Contents:
Publisher: Springer Berlin Heidelberg, Berlin/Heidelberg
Source file: Elektronische Wetenschappelijke Tijdschriften
 
 

                             Details for article 12 of 23 found articles
 
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 Koninklijke Bibliotheek - National Library of the Netherlands